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Two issues are fixed here: - I2S transmits the left frame with the clock low but I don't seem to get LRCLK out without SFRMDLY being set so invert SFRMP and set a delay. - I2S has a clock cycle prior to the first data byte in each channel so we need to delay the data by one cycle. Tested-by:Daniel Mack <daniel@caiaq.de> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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