Commit 0cb98e84 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'octeontx2-af-CGX-LMAC-link-bringup-and-cleanups' 



Linu Cherian says:

====================
octeontx2-af: CGX LMAC link bringup and cleanups

Patch 1: Code cleanup
Patch 2: Adds support for an unhandled hardware configuration
Patch 3: Preparatory patch for enabling cgx lmac links
Patch 4: Support for enabling cgx lmac links
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e159e592 d3b2b9ab

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+101 −7
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
 * @resp:		command response

 * @link_info:		link related information

 * @event_cb:		callback for linkchange events

 * @event_cb_lock:	lock for serializing callback with unregister

 * @cmd_pend:		flag set before new command is started

 *			flag cleared after command response is received

 * @cgx:		parent cgx port
@@ -43,6 +44,7 @@ struct lmac { 
	u64 resp;

	struct cgx_link_user_info link_info;

	struct cgx_event_cb event_cb;

	spinlock_t event_cb_lock;

	bool cmd_pend;

	struct cgx *cgx;

	u8 lmac_id;
@@ -55,6 +57,8 @@ struct cgx { 
	u8			cgx_id;

	u8			lmac_count;

	struct lmac		*lmac_idmap[MAX_LMAC_PER_CGX];

	struct			work_struct cgx_cmd_work;

	struct			workqueue_struct *cgx_cmd_workq;

	struct list_head	cgx_list;

};
@@ -66,6 +70,9 @@ static u32 cgx_speed_mbps[CGX_LINK_SPEED_MAX]; 
/* Convert firmware lmac type encoding to string */

static char *cgx_lmactype_string[LMAC_MODE_MAX];



/* CGX PHY management internal APIs */

static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool en);



/* Supported devices */

static const struct pci_device_id cgx_id_table[] = {

	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_CGX) },
@@ -92,17 +99,21 @@ static inline struct lmac *lmac_pdata(u8 lmac_id, struct cgx *cgx) 
	return cgx->lmac_idmap[lmac_id];

}



int cgx_get_cgx_cnt(void)

int cgx_get_cgxcnt_max(void)

{

	struct cgx *cgx_dev;

	int count = 0;

	int idmax = -ENODEV;



	list_for_each_entry(cgx_dev, &cgx_list, cgx_list)

		count++;

		if (cgx_dev->cgx_id > idmax)

			idmax = cgx_dev->cgx_id;



	if (idmax < 0)

		return 0;



	return count;

	return idmax + 1;

}

EXPORT_SYMBOL(cgx_get_cgx_cnt);

EXPORT_SYMBOL(cgx_get_cgxcnt_max);



int cgx_get_lmac_cnt(void *cgxd)

{
@@ -445,6 +456,9 @@ static inline void cgx_link_change_handler(u64 lstat, 
	lmac->link_info = event.link_uinfo;

	linfo = &lmac->link_info;



	/* Ensure callback doesn't get unregistered until we finish it */

	spin_lock(&lmac->event_cb_lock);



	if (!lmac->event_cb.notify_link_chg) {

		dev_dbg(dev, "cgx port %d:%d Link change handler null",

			cgx->cgx_id, lmac->lmac_id);
@@ -455,11 +469,13 @@ static inline void cgx_link_change_handler(u64 lstat, 
		dev_info(dev, "cgx port %d:%d Link is %s %d Mbps\n",

			 cgx->cgx_id, lmac->lmac_id,

			 linfo->link_up ? "UP" : "DOWN", linfo->speed);

		return;

		goto err;

	}



	if (lmac->event_cb.notify_link_chg(&event, lmac->event_cb.data))

		dev_err(dev, "event notification failure\n");

err:

	spin_unlock(&lmac->event_cb_lock);

}



static inline bool cgx_cmdresp_is_linkevent(u64 event)
@@ -548,6 +564,38 @@ int cgx_lmac_evh_register(struct cgx_event_cb *cb, void *cgxd, int lmac_id) 
}

EXPORT_SYMBOL(cgx_lmac_evh_register);



int cgx_lmac_evh_unregister(void *cgxd, int lmac_id)

{

	struct lmac *lmac;

	unsigned long flags;

	struct cgx *cgx = cgxd;



	lmac = lmac_pdata(lmac_id, cgx);

	if (!lmac)

		return -ENODEV;



	spin_lock_irqsave(&lmac->event_cb_lock, flags);

	lmac->event_cb.notify_link_chg = NULL;

	lmac->event_cb.data = NULL;

	spin_unlock_irqrestore(&lmac->event_cb_lock, flags);



	return 0;

}

EXPORT_SYMBOL(cgx_lmac_evh_unregister);



static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)

{

	u64 req = 0;

	u64 resp;



	if (enable)

		req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_UP, req);

	else

		req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_DOWN, req);



	return cgx_fwi_cmd_generic(req, &resp, cgx, lmac_id);

}



static inline int cgx_fwi_read_version(u64 *resp, struct cgx *cgx)

{

	u64 req = 0;
@@ -581,6 +629,34 @@ static int cgx_lmac_verify_fwi_version(struct cgx *cgx) 
		return 0;

}



static void cgx_lmac_linkup_work(struct work_struct *work)

{

	struct cgx *cgx = container_of(work, struct cgx, cgx_cmd_work);

	struct device *dev = &cgx->pdev->dev;

	int i, err;



	/* Do Link up for all the lmacs */

	for (i = 0; i < cgx->lmac_count; i++) {

		err = cgx_fwi_link_change(cgx, i, true);

		if (err)

			dev_info(dev, "cgx port %d:%d Link up command failed\n",

				 cgx->cgx_id, i);

	}

}



int cgx_lmac_linkup_start(void *cgxd)

{

	struct cgx *cgx = cgxd;



	if (!cgx)

		return -ENODEV;



	queue_work(cgx->cgx_cmd_workq, &cgx->cgx_cmd_work);



	return 0;

}

EXPORT_SYMBOL(cgx_lmac_linkup_start);



static int cgx_lmac_init(struct cgx *cgx)

{

	struct lmac *lmac;
@@ -602,6 +678,7 @@ static int cgx_lmac_init(struct cgx *cgx) 
		lmac->cgx = cgx;

		init_waitqueue_head(&lmac->wq_cmd_cmplt);

		mutex_init(&lmac->cmd_lock);

		spin_lock_init(&lmac->event_cb_lock);

		err = request_irq(pci_irq_vector(cgx->pdev,

						 CGX_LMAC_FWI + i * 9),

				   cgx_fwi_event_handler, 0, lmac->name, lmac);
@@ -624,6 +701,12 @@ static int cgx_lmac_exit(struct cgx *cgx) 
	struct lmac *lmac;

	int i;



	if (cgx->cgx_cmd_workq) {

		flush_workqueue(cgx->cgx_cmd_workq);

		destroy_workqueue(cgx->cgx_cmd_workq);

		cgx->cgx_cmd_workq = NULL;

	}



	/* Free all lmac related resources */

	for (i = 0; i < cgx->lmac_count; i++) {

		lmac = cgx->lmac_idmap[i];
@@ -679,8 +762,19 @@ static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id) 
		goto err_release_regions;

	}



	cgx->cgx_id = (pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM) >> 24)

		& CGX_ID_MASK;



	/* init wq for processing linkup requests */

	INIT_WORK(&cgx->cgx_cmd_work, cgx_lmac_linkup_work);

	cgx->cgx_cmd_workq = alloc_workqueue("cgx_cmd_workq", 0, 0);

	if (!cgx->cgx_cmd_workq) {

		dev_err(dev, "alloc workqueue failed for cgx cmd");

		err = -ENOMEM;

		goto err_release_regions;

	}



	list_add(&cgx->cgx_list, &cgx_list);

	cgx->cgx_id = cgx_get_cgx_cnt() - 1;



	cgx_link_usertable_init();

drivers/net/ethernet/marvell/octeontx2/af/cgx.h

+18 −16
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
/* PCI BAR nos */

#define PCI_CFG_REG_BAR_NUM		0



#define MAX_CGX				3

#define CGX_ID_MASK			0x7

#define MAX_LMAC_PER_CGX		4

#define CGX_FIFO_LEN			65536 /* 64K for both Rx & Tx */

#define CGX_OFFSET(x)			((x) * MAX_LMAC_PER_CGX)
@@ -95,11 +95,12 @@ struct cgx_event_cb { 


extern struct pci_driver cgx_driver;



int cgx_get_cgx_cnt(void);

int cgx_get_cgxcnt_max(void);

int cgx_get_lmac_cnt(void *cgxd);

void *cgx_get_pdata(int cgx_id);

int cgx_set_pkind(void *cgxd, u8 lmac_id, int pkind);

int cgx_lmac_evh_register(struct cgx_event_cb *cb, void *cgxd, int lmac_id);

int cgx_lmac_evh_unregister(void *cgxd, int lmac_id);

int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64 *tx_stat);

int cgx_get_rx_stats(void *cgxd, int lmac_id, int idx, u64 *rx_stat);

int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable);
@@ -109,4 +110,5 @@ void cgx_lmac_promisc_config(int cgx_id, int lmac_id, bool enable); 
int cgx_lmac_internal_loopback(void *cgxd, int lmac_id, bool enable);

int cgx_get_link_info(void *cgxd, int lmac_id,

		      struct cgx_link_user_info *linfo);

int cgx_lmac_linkup_start(void *cgxd);

#endif /* CGX_H */

drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h

+0 −2
Original line number Diff line number Diff line
@@ -78,8 +78,6 @@ enum cgx_cmd_id { 
	CGX_CMD_LINK_STATE_CHANGE,

	CGX_CMD_MODE_CHANGE,		/* hot plug support */

	CGX_CMD_INTF_SHUTDOWN,

	CGX_CMD_IRQ_ENABLE,

	CGX_CMD_IRQ_DISABLE,

};



/* async event ids */

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+15 −11
Original line number Diff line number Diff line
@@ -811,17 +811,26 @@ init: 


	err = rvu_npc_init(rvu);

	if (err)

		return err;

		goto exit;



	err = rvu_cgx_init(rvu);

	if (err)

		goto exit;



	err = rvu_npa_init(rvu);

	if (err)

		return err;

		goto cgx_err;



	err = rvu_nix_init(rvu);

	if (err)

		return err;

		goto cgx_err;



	return 0;



cgx_err:

	rvu_cgx_exit(rvu);

exit:

	return err;

}



/* NPA and NIX admin queue APIs */
@@ -2419,13 +2428,9 @@ static int rvu_probe(struct pci_dev *pdev, const struct pci_device_id *id) 
	if (err)

		goto err_hwsetup;



	err = rvu_cgx_probe(rvu);

	if (err)

		goto err_mbox;



	err = rvu_flr_init(rvu);

	if (err)

		goto err_cgx;

		goto err_mbox;



	err = rvu_register_interrupts(rvu);

	if (err)
@@ -2441,11 +2446,10 @@ err_irq: 
	rvu_unregister_interrupts(rvu);

err_flr:

	rvu_flr_wq_destroy(rvu);

err_cgx:

	rvu_cgx_wq_destroy(rvu);

err_mbox:

	rvu_mbox_destroy(&rvu->afpf_wq_info);

err_hwsetup:

	rvu_cgx_exit(rvu);

	rvu_reset_all_blocks(rvu);

	rvu_free_hw_resources(rvu);

err_release_regions:
@@ -2465,7 +2469,7 @@ static void rvu_remove(struct pci_dev *pdev) 


	rvu_unregister_interrupts(rvu);

	rvu_flr_wq_destroy(rvu);

	rvu_cgx_wq_destroy(rvu);

	rvu_cgx_exit(rvu);

	rvu_mbox_destroy(&rvu->afpf_wq_info);

	rvu_disable_sriov(rvu);

	rvu_reset_all_blocks(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+3 −3
Original line number Diff line number Diff line
@@ -226,7 +226,7 @@ struct rvu { 
	/* CGX */

#define PF_CGXMAP_BASE		1 /* PF 0 is reserved for RVU PF */

	u8			cgx_mapped_pfs;

	u8			cgx_cnt; /* available cgx ports */

	u8			cgx_cnt_max;	 /* CGX port count max */

	u8			*pf2cgxlmac_map; /* pf to cgx_lmac map */

	u16			*cgxlmac2pf_map; /* bitmap of mapped pfs for

						  * every cgx lmac port
@@ -316,8 +316,8 @@ static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id) 
	*lmac_id = (map & 0xF);

}



int rvu_cgx_probe(struct rvu *rvu);

void rvu_cgx_wq_destroy(struct rvu *rvu);

int rvu_cgx_init(struct rvu *rvu);

int rvu_cgx_exit(struct rvu *rvu);

void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);

int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);

int rvu_mbox_handler_cgx_start_rxtx(struct rvu *rvu, struct msg_req *req,

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