dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings (0c79cf1f) · Commits · 戴 / test

Armada CP110 PCIe controller can have from one to four PHYs for configuring SERDES lanes (PCIe x1, PCIe x2 or PCIe x4). Describe the phys and phy-names properties in the bindings. Signed-off-by:

Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by:

Kishon Vijay Abraham I <kishon@ti.com>

Documentation/devicetree/bindings/pci/pci-armada8k.txt

+8 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,14 @@ Required properties:
		name must be "core" for the first clock and "reg" for the second
		one

		Optional properties:
		- phys: phandle(s) to PHY node(s) following the generic PHY bindings.
		Either 1, 2 or 4 PHYs might be needed depending on the number of
		PCIe lanes.
		- phy-names: names of the PHYs corresponding to the number of lanes.
		Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
		2 PHYs.

		Example:

		pcie@f2600000 {

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