Merge tag 'common-clk-audio' of...

* Samsung Audio Subsystem Clock Controller

The Samsung Audio Subsystem clock controller generates and supplies clocks

to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock

binding described here is applicable to all SoC's in Exynos family.

Required Properties:

- compatible: should be one of the following:

  - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs.

  - "samsung,exynos5250-audss-clock" - controller compatible with all Exynos5 SoCs.

- reg: physical base address and length of the controller's register set.

- #clock-cells: should be 1.

The following is the list of clocks generated by the controller. Each clock is

assigned an identifier and client nodes use this identifier to specify the

clock which they consume. Some of the clocks are available only on a particular

Exynos4 SoC and this is specified where applicable.

Provided clocks:

Clock           ID      SoC (if specific)

-----------------------------------------------

mout_audss      0

mout_i2s        1

dout_srp        2

dout_aud_bus    3

dout_i2s        4

srp_clk         5

i2s_bus         6

sclk_i2s        7

pcm_bus         8

sclk_pcm        9

Example 1: An example of a clock controller node is listed below.

clock_audss: audss-clock-controller@3810000 {

	compatible = "samsung,exynos5250-audss-clock";

	reg = <0x03810000 0x0C>;

	#clock-cells = <1>;

};

Example 2: I2S controller node that consumes the clock generated by the clock

           controller. Refer to the standard clock bindings for information

           about 'clocks' and 'clock-names' property.

i2s0: i2s@03830000 {

	compatible = "samsung,i2s-v5";

	reg = <0x03830000 0x100>;

	dmas = <&pdma0 10

		&pdma0 9

		&pdma0 8>;

	dma-names = "tx", "rx", "tx-sec";

	clocks = <&clock_audss EXYNOS_I2S_BUS>,

		<&clock_audss EXYNOS_I2S_BUS>,

		<&clock_audss EXYNOS_SCLK_I2S>,

		<&clock_audss EXYNOS_MOUT_AUDSS>,

		<&clock_audss EXYNOS_MOUT_I2S>;

	clock-names = "iis", "i2s_opclk0", "i2s_opclk1",

	"mout_audss", "mout_i2s";

};

- dmas: list of DMA controller phandle and DMA request line ordered pairs.

- dma-names: identifier string for each DMA request line in the dmas property.

  These strings correspond 1:1 with the ordered pairs in dmas.

- clocks: Handle to iis clock and RCLK source clk.

- clock-names:

  i2s0 uses some base clks from CMU and some are from audio subsystem internal

  clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and

  "i2s_opclk1" as shown in the example below.

  i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should

  be "iis" and "i2s_opclk0".

  "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root

  clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2

  doesn't have any such mux.

Optional SoC Specific Properties:

  then this flag is enabled.

- samsung,idma-addr: Internal DMA register base address of the audio

  sub system(used in secondary sound source).

Required Board Specific Properties:

- gpios: The gpio specifier for data out,data in, LRCLK, CDCLK and SCLK

  interface lines. The format of the gpio specifier depends on the gpio

  controller.

  The syntax of samsung gpio specifier is

	<[phandle of the gpio controller node]

	 [pin number within the gpio controller]

	 [mux function]

	 [flags and pull up/down]

	 [drive strength]>

- pinctrl-0: Should specify pin control groups used for this controller.

- pinctrl-names: Should contain only one value - "default".

Example:

- SoC Specific Portion:

i2s@03830000 {

i2s0: i2s@03830000 {

	compatible = "samsung,i2s-v5";

	reg = <0x03830000 0x100>;

	dmas = <&pdma0 10

		&pdma0 9

		&pdma0 8>;

	dma-names = "tx", "rx", "tx-sec";

	clocks = <&clock_audss EXYNOS_I2S_BUS>,

		<&clock_audss EXYNOS_I2S_BUS>,

		<&clock_audss EXYNOS_SCLK_I2S>;

	clock-names = "iis", "i2s_opclk0", "i2s_opclk1";

	samsung,supports-6ch;

	samsung,supports-rstclr;

	samsung,supports-secdai;

	samsung,idma-addr = <0x03000000>;

};

- Board Specific Portion:

i2s@03830000 {

	gpios = <&gpz 0 2 0 0>, /* I2S_0_SCLK */

		<&gpz 1 2 0 0>, /* I2S_0_CDCLK */

		<&gpz 2 2 0 0>, /* I2S_0_LRCK */

		<&gpz 3 2 0 0>, /* I2S_0_SDI */

		<&gpz 4 2 0 0>, /* I2S_0_SDO[1] */

		<&gpz 5 2 0 0>, /* I2S_0_SDO[2] */

		<&gpz 6 2 0 0>; /* I2S_0_SDO[3] */

	pinctrl-names = "default";

	pinctrl-0 = <&i2s0_bus>;

};

 * published by the Free Software Foundation.

 */

/include/ "skeleton.dtsi"

#include "skeleton.dtsi"

/ {

	interrupt-parent = <&gic>;

*/

/dts-v1/;

/include/ "exynos4210.dtsi"

#include "exynos4210.dtsi"

/ {

	model = "Insignal Origen evaluation board based on Exynos4210";

*/

/dts-v1/;

/include/ "exynos4210.dtsi"

#include "exynos4210.dtsi"

/ {

	model = "Samsung smdkv310 evaluation board based on Exynos4210";