Commit 0c653722 authored by Arkadiusz Hiler's avatar Arkadiusz Hiler Committed by Chris Wilson
Browse files

drm/i915: Get the correct wakeref for reading HOTPLUG_EN et al.

Without it we get:
 Unclaimed read from register 0x1e1110
 WARNING: CPU: 2 PID: 1029 at drivers/gpu/drm/i915/intel_uncore.c:1101 __unclaimed_reg_debug+0x40/0x50 [i915]
 Call Trace:
  fwtable_read32+0x233/0x300 [i915]
  i915_interrupt_info+0xa73/0xd60 [i915]
  seq_read+0xdb/0x3c0
  full_proxy_read+0x51/0x80
  vfs_read+0x9e/0x160
  ksys_read+0x8f/0xe0
  do_syscall_64+0x55/0x1c0
  entry_SYSCALL_64_after_hwframe+0x49/0xbe

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109824


Signed-off-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190912125418.23115-2-arkadiusz.hiler@intel.com
parent ee73e279
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+4 −1
Original line number Diff line number Diff line
@@ -534,6 +534,8 @@ static int i915_interrupt_info(struct seq_file *m, void *data)

		gen8_display_interrupt_info(m);
	} else if (IS_VALLEYVIEW(dev_priv)) {
		intel_wakeref_t pref;

		seq_printf(m, "Display IER:\t%08x\n",
			   I915_READ(VLV_IER));
		seq_printf(m, "Display IIR:\t%08x\n",
@@ -544,7 +546,6 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
			   I915_READ(VLV_IMR));
		for_each_pipe(dev_priv, pipe) {
			enum intel_display_power_domain power_domain;
			intel_wakeref_t pref;

			power_domain = POWER_DOMAIN_PIPE(pipe);
			pref = intel_display_power_get_if_enabled(dev_priv,
@@ -578,12 +579,14 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
		seq_printf(m, "PM IMR:\t\t%08x\n",
			   I915_READ(GEN6_PMIMR));

		pref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
		seq_printf(m, "Port hotplug:\t%08x\n",
			   I915_READ(PORT_HOTPLUG_EN));
		seq_printf(m, "DPFLIPSTAT:\t%08x\n",
			   I915_READ(VLV_DPFLIPSTAT));
		seq_printf(m, "DPINVGTT:\t%08x\n",
			   I915_READ(DPINVGTT));
		intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, pref);

	} else if (!HAS_PCH_SPLIT(dev_priv)) {
		seq_printf(m, "Interrupt enable:    %08x\n",