Commit 0c54914d authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

KVM: x86: use Intel speculation bugs and features as derived in generic x86 code 



Similar to AMD bits, set the Intel bits from the vendor-independent
feature and bug flags, because KVM_GET_SUPPORTED_CPUID does not care
about the vendor and they should be set on AMD processors as well.

Suggested-by: default avatarJim Mattson <jmattson@google.com>
Reviewed-by: default avatarJim Mattson <jmattson@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 50896de4

arch/x86/kvm/cpuid.c

+6 −0
Original line number Diff line number Diff line
@@ -392,6 +392,12 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) 


		entry->edx &= kvm_cpuid_7_0_edx_x86_features;

		cpuid_mask(&entry->edx, CPUID_7_EDX);

		if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))

			entry->edx |= F(SPEC_CTRL);

		if (boot_cpu_has(X86_FEATURE_STIBP))

			entry->edx |= F(INTEL_STIBP);

		if (boot_cpu_has(X86_FEATURE_SSBD))

			entry->edx |= F(SPEC_CTRL_SSBD);

		/*

		 * We emulate ARCH_CAPABILITIES in software even

		 * if the host doesn't support it.

arch/x86/kvm/x86.c

+7 −0
Original line number Diff line number Diff line
@@ -1254,6 +1254,13 @@ static u64 kvm_get_arch_capabilities(void) 
	if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)

		data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;



	if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))

		data |= ARCH_CAP_RDCL_NO;

	if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))

		data |= ARCH_CAP_SSB_NO;

	if (!boot_cpu_has_bug(X86_BUG_MDS))

		data |= ARCH_CAP_MDS_NO;



	return data;

}

CRA Git | Maintained and supported by SUSTech CRA and CCSE