[POWERPC] 85xx: Killed <asm/mpc85xx.h> (0bfd5df5) · Commits · 戴 / test

arch/powerpc/platforms/85xx/mpc8540_ads.h

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		/*
		* arch/powerpc/platforms/85xx/mpc8540_ads.h
		*
		* MPC8540ADS board definitions
		*
		* Maintainer: Kumar Gala <kumar.gala@freescale.com>
		*
		* Copyright 2004 Freescale Semiconductor Inc.
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License as published by the
		* Free Software Foundation; either version 2 of the License, or (at your
		* option) any later version.
		*
		*/

		#ifndef __MACH_MPC8540ADS_H__
		#define __MACH_MPC8540ADS_H__

		#include <linux/initrd.h>

		#define BOARD_CCSRBAR ((uint)0xe0000000)
		#define BCSR_ADDR ((uint)0xf8000000)
		#define BCSR_SIZE ((uint)(32 * 1024))

		/* PCI interrupt controller */
		#define PIRQA MPC85xx_IRQ_EXT1
		#define PIRQB MPC85xx_IRQ_EXT2
		#define PIRQC MPC85xx_IRQ_EXT3
		#define PIRQD MPC85xx_IRQ_EXT4

		/* Offset of CPM register space */
		#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)

		#endif /* __MACH_MPC8540ADS_H__ */

arch/powerpc/platforms/85xx/mpc85xx_ads.c

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		@@ -23,7 +23,6 @@
		#include <asm/time.h>
		#include <asm/machdep.h>
		#include <asm/pci-bridge.h>
		#include <asm/mpc85xx.h>
		#include <asm/mpic.h>
		#include <mm/mmu_decl.h>
		#include <asm/udbg.h>

arch/powerpc/platforms/85xx/mpc85xx_ads.h

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		/*
		* MPC85xx ADS board definitions
		*
		* Maintainer: Kumar Gala <galak@kernel.crashing.org>
		*
		* Copyright 2004 Freescale Semiconductor Inc.
		*
		* 2006 (c) MontaVista Software, Inc.
		* Vitaly Bordug <vbordug@ru.mvista.com>
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License as published by the
		* Free Software Foundation; either version 2 of the License, or (at your
		* option) any later version.
		*
		*/

		#ifndef __MACH_MPC85XXADS_H
		#define __MACH_MPC85XXADS_H

		#include <linux/initrd.h>
		#include <sysdev/fsl_soc.h>

		#define BCSR_ADDR ((uint)0xf8000000)
		#define BCSR_SIZE ((uint)(32 * 1024))

		#ifdef CONFIG_CPM2

		#define MPC85xx_CPM_OFFSET (0x80000)

		#define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET)
		#define CPM_IRQ_OFFSET 60

		#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
		#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
		#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
		#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
		#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
		#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)

		/* FCC1 Clock Source Configuration. These can be
		* redefined in the board specific file.
		* Can only choose from CLK9-12 */
		#define F1_RXCLK 12
		#define F1_TXCLK 11

		/* FCC2 Clock Source Configuration. These can be
		* redefined in the board specific file.
		* Can only choose from CLK13-16 */
		#define F2_RXCLK 13
		#define F2_TXCLK 14

		/* FCC3 Clock Source Configuration. These can be
		* redefined in the board specific file.
		* Can only choose from CLK13-16 */
		#define F3_RXCLK 15
		#define F3_TXCLK 16

		#endif /* CONFIG_CPM2 */
		#endif /* __MACH_MPC85XXADS_H */

arch/powerpc/platforms/85xx/mpc85xx_cds.c

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		@@ -36,7 +36,6 @@
		#include <asm/machdep.h>
		#include <asm/ipic.h>
		#include <asm/pci-bridge.h>
		#include <asm/mpc85xx.h>
		#include <asm/irq.h>
		#include <mm/mmu_decl.h>
		#include <asm/prom.h>
		@@ -47,6 +46,15 @@
		#include <sysdev/fsl_soc.h>
		#include <sysdev/fsl_pci.h>

		/* CADMUS info */
		/* xxx - galak, move into device tree */
		#define CADMUS_BASE (0xf8004000)
		#define CADMUS_SIZE (256)
		#define CM_VER (0)
		#define CM_CSR (1)
		#define CM_RST (2)


		static int cds_pci_slot = 2;
		static volatile u8 *cadmus;

arch/powerpc/platforms/85xx/mpc85xx_cds.h

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		/*
		* arch/powerpc/platforms/85xx/mpc85xx_cds.h
		*
		* MPC85xx CDS board definitions
		*
		* Maintainer: Kumar Gala <galak@kernel.crashing.org>
		*
		* Copyright 2004 Freescale Semiconductor, Inc
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License as published by the
		* Free Software Foundation; either version 2 of the License, or (at your
		* option) any later version.
		*
		*/

		#ifndef __MACH_MPC85XX_CDS_H__
		#define __MACH_MPC85XX_CDS_H__

		/* CADMUS info */
		#define CADMUS_BASE (0xf8004000)
		#define CADMUS_SIZE (256)
		#define CM_VER (0)
		#define CM_CSR (1)
		#define CM_RST (2)

		/* CDS NVRAM/RTC */
		#define CDS_RTC_ADDR (0xf8000000)
		#define CDS_RTC_SIZE (8 * 1024)

		/* PCI interrupt controller */
		#define PIRQ0A MPC85xx_IRQ_EXT0
		#define PIRQ0B MPC85xx_IRQ_EXT1
		#define PIRQ0C MPC85xx_IRQ_EXT2
		#define PIRQ0D MPC85xx_IRQ_EXT3
		#define PIRQ1A MPC85xx_IRQ_EXT11

		#define NR_8259_INTS 16
		#define CPM_IRQ_OFFSET NR_8259_INTS

		#define MPC85xx_OPENPIC_IRQ_OFFSET 80

		#endif /* __MACH_MPC85XX_CDS_H__ */

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