Commit 0bb94e03 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: s/cdclk_state/cdclk_config/ 



I want to have a higher level cdclk state object so let's rename
the current lower level thing to cdclk_config (because I lack
imagination).

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-8-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent 65c88a86

drivers/gpu/drm/i915/display/intel_cdclk.c

+215 −211

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/i915/display/intel_cdclk.h

+9 −9
Original line number Original line Diff line number Diff line
@@ -12,7 +12,7 @@ 




struct drm_i915_private;

struct drm_i915_private;

struct intel_atomic_state;

struct intel_atomic_state;

struct intel_cdclk_state;

struct intel_cdclk_config;

struct intel_crtc_state;

struct intel_crtc_state;





struct intel_cdclk_vals {

struct intel_cdclk_vals {
@@ -29,21 +29,21 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv); 
void intel_update_max_cdclk(struct drm_i915_private *dev_priv);

void intel_update_max_cdclk(struct drm_i915_private *dev_priv);

void intel_update_cdclk(struct drm_i915_private *dev_priv);

void intel_update_cdclk(struct drm_i915_private *dev_priv);

void intel_update_rawclk(struct drm_i915_private *dev_priv);

void intel_update_rawclk(struct drm_i915_private *dev_priv);

bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,

bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,

			       const struct intel_cdclk_state *b);

			       const struct intel_cdclk_config *b);

void intel_cdclk_clear_state(struct intel_atomic_state *state);

void intel_cdclk_clear_state(struct intel_atomic_state *state);

void intel_cdclk_swap_state(struct intel_atomic_state *state);

void intel_cdclk_swap_state(struct intel_atomic_state *state);

void

void

intel_set_cdclk_pre_plane_update(struct drm_i915_private *dev_priv,

intel_set_cdclk_pre_plane_update(struct drm_i915_private *dev_priv,

				 const struct intel_cdclk_state *old_state,

				 const struct intel_cdclk_config *old_state,

				 const struct intel_cdclk_state *new_state,

				 const struct intel_cdclk_config *new_state,

				 enum pipe pipe);

				 enum pipe pipe);

void

void

intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv,

intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv,

				  const struct intel_cdclk_state *old_state,

				  const struct intel_cdclk_config *old_state,

				  const struct intel_cdclk_state *new_state,

				  const struct intel_cdclk_config *new_state,

				  enum pipe pipe);

				  enum pipe pipe);

void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,

void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config,

			     const char *context);

			     const char *context);

int intel_modeset_calc_cdclk(struct intel_atomic_state *state);

int intel_modeset_calc_cdclk(struct intel_atomic_state *state);

drivers/gpu/drm/i915/display/intel_display.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -17576,7 +17576,7 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv) 
void intel_modeset_init_hw(struct drm_i915_private *i915)

void intel_modeset_init_hw(struct drm_i915_private *i915)

{

{

	intel_update_cdclk(i915);

	intel_update_cdclk(i915);

	intel_dump_cdclk_state(&i915->cdclk.hw, "Current CDCLK");

	intel_dump_cdclk_config(&i915->cdclk.hw, "Current CDCLK");

	i915->cdclk.logical = i915->cdclk.actual = i915->cdclk.hw;

	i915->cdclk.logical = i915->cdclk.actual = i915->cdclk.hw;

}

}







































drivers/gpu/drm/i915/display/intel_display_power.c



+4
−4






























Original line number
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Diff line number
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@@ -1050,7 +1050,7 @@ static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv)





























static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)







static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)











{







{











	struct intel_cdclk_state cdclk_state = {};







	struct intel_cdclk_config cdclk_config = {};































	if (dev_priv->csr.target_dc_state == DC_STATE_EN_DC3CO) {







	if (dev_priv->csr.target_dc_state == DC_STATE_EN_DC3CO) {











		tgl_disable_dc3co(dev_priv);







		tgl_disable_dc3co(dev_priv);









@@ -1059,9 +1059,9 @@ static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)





























	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);







	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);































	dev_priv->display.get_cdclk(dev_priv, &cdclk_state);







	dev_priv->display.get_cdclk(dev_priv, &cdclk_config);











	/* Can't read out voltage_level so can't use intel_cdclk_changed() */







	/* Can't read out voltage_level so can't use intel_cdclk_changed() */











	WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_state));







	WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_config));































	gen9_assert_dbuf_enabled(dev_priv);







	gen9_assert_dbuf_enabled(dev_priv);






























@@ -4696,7 +4696,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)









	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);







	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);































	intel_update_cdclk(dev_priv);







	intel_update_cdclk(dev_priv);











	intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");







	intel_dump_cdclk_config(&dev_priv->cdclk.hw, "Current CDCLK");











}







}































/*







/*

































drivers/gpu/drm/i915/display/intel_display_types.h



+7
−7






























Original line number
Original line
Diff line number
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@@ -464,17 +464,17 @@ struct intel_atomic_state {





























	struct {







	struct {











		/*







		/*











		 * Logical state of cdclk (used for all scaling, watermark,







		 * Logical configuration of cdclk (used for all scaling,











		 * etc. calculations and checks). This is computed as if all







		 * watermark, etc. calculations and checks). This is











		 * enabled crtcs were active.







		 * computed as if all enabled crtcs were active.











		 */







		 */











		struct intel_cdclk_state logical;







		struct intel_cdclk_config logical;































		/*







		/*











		 * Actual state of cdclk, can be different from the logical







		 * Actual configuration of cdclk, can be different from the











		 * state only when all crtc's are DPMS off.







		 * logical configuration only when all crtc's are DPMS off.











		 */







		 */











		struct intel_cdclk_state actual;







		struct intel_cdclk_config actual;































		int force_min_cdclk;







		int force_min_cdclk;











		bool force_min_cdclk_changed;







		bool force_min_cdclk_changed;









































































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