Commit 0b7d9978 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'Microsemi-Ocelot-Ethernet-switch-support' 



Alexandre Belloni says:

====================
Microsemi Ocelot Ethernet switch support

This series adds initial support for the Microsemi Ethernet switch
present on Ocelot SoCs.

This only has bridging (and STP) support for now and it uses the
switchdev framework.
Coming features are VLAN filtering, link aggregation, IGMP snooping.

The switch can also be connected to an external CPU using PCIe.

Also, support for integration on other SoCs will be submitted.

The ocelot dts changes are here for reference and should probably go
through the MIPS tree once the bindings are accepted.

Changes in v3:
 - Collected Reviewed-by
 * Switchdev driver:
   - Fixed two issues reported by kbuild
   - Modified ethtool statistics to support different layoiut on different chips and take care of counter overflow

Changes in v2:
 - Dropped Microsemi Ocelot PHY support
 * MIIM driver:
   - Documented interrupts bindings
   - Moved the driver to drivers/net/phy/
   - Removed unused mutex
   - Removed MDIO bus scanning
 * Switchdev driver:
   - Changed compatible to mscc,vsc7514-switch
   - Removed unused header inclusion
   - Factorized MAC table selection in ocelot_mact_select()
   - Disable the port in ocelot_port_stop()
   - Fixed the smatch endianness warnings
   - int to unsinged int where necessary
   - Removed VID handling for the FDB it has been reworked anyway and will be
     submitted with VLAN support
   - Fixed up unused cases in ocelot_port_attr_set()
   - Added a loop to register all the IO register spaces
   - the ports are now in an ethernet-ports node

I've tried switching to NAPI but this is not working well, mainly because the
only way to disable interrupts is to actually mask them in the interrupt
controller (it is not possible to tell the switch to stop generating
interrupts).
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 961423f9 0ce60edd

Documentation/devicetree/bindings/net/mscc-miim.txt

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Microsemi MII Management Controller (MIIM) / MDIO

=================================================



Properties:

- compatible: must be "mscc,ocelot-miim"

- reg: The base address of the MDIO bus controller register bank. Optionally, a

  second register bank can be defined if there is an associated reset register

  for internal PHYs

- #address-cells: Must be <1>.

- #size-cells: Must be <0>.  MDIO addresses have no size component.

- interrupts: interrupt specifier (refer to the interrupt binding)



Typically an MDIO bus might have several children.



Example:

	mdio@107009c {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "mscc,ocelot-miim";

		reg = <0x107009c 0x36>, <0x10700f0 0x8>;

		interrupts = <14>;



		phy0: ethernet-phy@0 {

			reg = <0>;

		};

	};

Documentation/devicetree/bindings/net/mscc-ocelot.txt

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Microsemi Ocelot network Switch

===============================



The Microsemi Ocelot network switch can be found on Microsemi SoCs (VSC7513,

VSC7514)



Required properties:

- compatible: Should be "mscc,vsc7514-switch"

- reg: Must contain an (offset, length) pair of the register set for each

  entry in reg-names.

- reg-names: Must include the following entries:

  - "sys"

  - "rew"

  - "qs"

  - "hsio"

  - "qsys"

  - "ana"

  - "portX" with X from 0 to the number of last port index available on that

    switch

- interrupts: Should contain the switch interrupts for frame extraction and

  frame injection

- interrupt-names: should contain the interrupt names: "xtr", "inj"

- ethernet-ports: A container for child nodes representing switch ports.



The ethernet-ports container has the following properties



Required properties:



- #address-cells: Must be 1

- #size-cells: Must be 0



Each port node must have the following mandatory properties:

- reg: Describes the port address in the switch



Port nodes may also contain the following optional standardised

properties, described in binding documents:



- phy-handle: Phandle to a PHY on an MDIO bus. See

  Documentation/devicetree/bindings/net/ethernet.txt for details.



Example:



	switch@1010000 {

		compatible = "mscc,vsc7514-switch";

		reg = <0x1010000 0x10000>,

		      <0x1030000 0x10000>,

		      <0x1080000 0x100>,

		      <0x10d0000 0x10000>,

		      <0x11e0000 0x100>,

		      <0x11f0000 0x100>,

		      <0x1200000 0x100>,

		      <0x1210000 0x100>,

		      <0x1220000 0x100>,

		      <0x1230000 0x100>,

		      <0x1240000 0x100>,

		      <0x1250000 0x100>,

		      <0x1260000 0x100>,

		      <0x1270000 0x100>,

		      <0x1280000 0x100>,

		      <0x1800000 0x80000>,

		      <0x1880000 0x10000>;

		reg-names = "sys", "rew", "qs", "hsio", "port0",

			    "port1", "port2", "port3", "port4", "port5",

			    "port6", "port7", "port8", "port9", "port10",

			    "qsys", "ana";

		interrupts = <21 22>;

		interrupt-names = "xtr", "inj";



		ethernet-ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port0: port@0 {

				reg = <0>;

				phy-handle = <&phy0>;

			};

			port1: port@1 {

				reg = <1>;

				phy-handle = <&phy1>;

			};

		};

	};

MAINTAINERS

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@@ -9279,6 +9279,12 @@ F: include/linux/cciss*.h 
F:	include/uapi/linux/cciss*.h

F:	Documentation/scsi/smartpqi.txt



MICROSEMI ETHERNET SWITCH DRIVER

M:	Alexandre Belloni <alexandre.belloni@bootlin.com>

L:	netdev@vger.kernel.org

S:	Supported

F:	drivers/net/ethernet/mscc/



MICROSOFT SURFACE PRO 3 BUTTON DRIVER

M:	Chen Yu <yu.c.chen@intel.com>

L:	platform-driver-x86@vger.kernel.org

drivers/net/ethernet/Kconfig

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@@ -114,6 +114,7 @@ source "drivers/net/ethernet/mediatek/Kconfig" 
source "drivers/net/ethernet/mellanox/Kconfig"

source "drivers/net/ethernet/micrel/Kconfig"

source "drivers/net/ethernet/microchip/Kconfig"

source "drivers/net/ethernet/mscc/Kconfig"

source "drivers/net/ethernet/moxa/Kconfig"

source "drivers/net/ethernet/myricom/Kconfig"

drivers/net/ethernet/Makefile

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@@ -55,6 +55,7 @@ obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/ 
obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/

obj-$(CONFIG_NET_VENDOR_MICREL) += micrel/

obj-$(CONFIG_NET_VENDOR_MICROCHIP) += microchip/

obj-$(CONFIG_NET_VENDOR_MICROSEMI) += mscc/

obj-$(CONFIG_NET_VENDOR_MOXART) += moxa/

obj-$(CONFIG_NET_VENDOR_MYRI) += myricom/

obj-$(CONFIG_FEALNX) += fealnx.o

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