drm/i915/sseu: Move sseu_info under gt_info (0b6613c6) · Commits · 戴 / test

drivers/gpu/drm/i915/gem/i915_gem_context.c

+4 −3

Original line number	Diff line number	Diff line
		@@ -1400,11 +1400,12 @@ static int get_ringsize(struct i915_gem_context *ctx,
		}

		int
		i915_gem_user_to_context_sseu(struct drm_i915_private *i915,
		i915_gem_user_to_context_sseu(struct intel_gt *gt,
		const struct drm_i915_gem_context_param_sseu *user,
		struct intel_sseu *context)
		{
		const struct sseu_dev_info *device = &RUNTIME_INFO(i915)->sseu;
		const struct sseu_dev_info *device = &gt->info.sseu;
		struct drm_i915_private *i915 = gt->i915;

		/* No zeros in any field. */
		if (!user->slice_mask \|\| !user->subslice_mask \|\|
		@@ -1537,7 +1538,7 @@ static int set_sseu(struct i915_gem_context *ctx,
		goto out_ce;
		}

		ret = i915_gem_user_to_context_sseu(i915, &user_sseu, &sseu);
		ret = i915_gem_user_to_context_sseu(ce->engine->gt, &user_sseu, &sseu);
		if (ret)
		goto out_ce;

+1 −1

Original line number	Diff line number	Diff line
		@@ -225,7 +225,7 @@ i915_gem_engines_iter_next(struct i915_gem_engines_iter *it);
		struct i915_lut_handle *i915_lut_handle_alloc(void);
		void i915_lut_handle_free(struct i915_lut_handle *lut);

		int i915_gem_user_to_context_sseu(struct drm_i915_private *i915,
		int i915_gem_user_to_context_sseu(struct intel_gt *gt,
		const struct drm_i915_gem_context_param_sseu *user,
		struct intel_sseu *context);

+4 −1

Original line number	Diff line number	Diff line
		@@ -1229,7 +1229,7 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
		int inst = 0;
		int ret = 0;

		if (INTEL_GEN(i915) < 9 \|\| !RUNTIME_INFO(i915)->sseu.has_slice_pg)
		if (INTEL_GEN(i915) < 9)
		return 0;

		if (flags & TEST_RESET)
		@@ -1255,6 +1255,9 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
		if (hweight32(engine->sseu.slice_mask) < 2)
		continue;

		if (!engine->gt->info.sseu.has_slice_pg)
		continue;

		/*
		* Gen11 VME friendly power-gated configuration with
		* half enabled sub-slices.

+1 −1

Original line number	Diff line number	Diff line
		@@ -30,7 +30,7 @@ static int gen8_emit_rpcs_config(struct i915_request *rq,
		*cs++ = MI_STORE_DWORD_IMM_GEN4 \| MI_USE_GGTT;
		*cs++ = lower_32_bits(offset);
		*cs++ = upper_32_bits(offset);
		*cs++ = intel_sseu_make_rpcs(rq->engine->i915, &sseu);
		*cs++ = intel_sseu_make_rpcs(rq->engine->gt, &sseu);

		intel_ring_advance(rq, cs);

+2 −2

Original line number	Diff line number	Diff line
		@@ -709,7 +709,7 @@ static int engine_setup_common(struct intel_engine_cs *engine)

		/* Use the whole device by default */
		engine->sseu =
		intel_sseu_from_device_info(&RUNTIME_INFO(engine->i915)->sseu);
		intel_sseu_from_device_info(&engine->gt->info.sseu);

		intel_engine_init_workarounds(engine);
		intel_engine_init_whitelist(engine);
		@@ -1075,7 +1075,7 @@ void intel_engine_get_instdone(const struct intel_engine_cs *engine,
		struct intel_instdone *instdone)
		{
		struct drm_i915_private *i915 = engine->i915;
		const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
		const struct sseu_dev_info *sseu = &engine->gt->info.sseu;
		struct intel_uncore *uncore = engine->uncore;
		u32 mmio_base = engine->mmio_base;
		int slice;