Commit 0ae3abcd authored by James Hogan's avatar James Hogan
Browse files

MIPS: Allow KVM to be enabled on Octeon CPUs 



Octeon III has VZ ASE support, so allow KVM to be enabled on Octeon
CPUs as it should now be functional.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
parent 1f48f9be

arch/mips/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -1687,6 +1687,7 @@ config CPU_CAVIUM_OCTEON 
	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN

	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN

	select MIPS_L1_CACHE_SHIFT_7

	select HAVE_KVM

	help

	  The Cavium Octeon processor is a highly integrated chip containing

	  many ethernet hardware widgets for networking tasks. The processor

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