Commit 0ad7a64d authored by John Clements's avatar John Clements Committed by Alex Deucher
Browse files

drm/amdgpu: enable RAS support for sienna cichlid 



enabled GECC error injection and query support

Reviewed-by: default avatarGuchun Chen <guchun.chen@amd.com>
Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a300de40

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+3 −2
Original line number Diff line number Diff line
@@ -1966,7 +1966,8 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev, 


	if (amdgpu_sriov_vf(adev) || !adev->is_atom_fw ||

	    (adev->asic_type != CHIP_VEGA20   &&

	     adev->asic_type != CHIP_ARCTURUS))

	     adev->asic_type != CHIP_ARCTURUS &&

	     adev->asic_type != CHIP_SIENNA_CICHLID))

		return;



	if (amdgpu_atomfirmware_mem_ecc_supported(adev)) {

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+4 −0
Original line number Diff line number Diff line
@@ -633,6 +633,10 @@ static int gmc_v10_0_late_init(void *handle) 
	if (r)

		return r;



	r = amdgpu_gmc_ras_late_init(adev);

	if (r)

		return r;



	return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);

}

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