Commit 0a3b7bac authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville
Browse files

ath9k_hw: make both analog channel change routines return int



This allows us to later define a callback for both.

Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent dc51dd50
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+13 −11
Original line number Diff line number Diff line
@@ -1868,6 +1868,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
	struct ath_common *common = ath9k_hw_common(ah);
	struct ieee80211_channel *channel = chan->chan;
	u32 synthDelay, qnum;
	int r;

	for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
		if (ath9k_hw_numtxpending(ah, qnum)) {
@@ -1888,15 +1889,15 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,

	ath9k_hw_set_regs(ah, chan);

	if (AR_SREV_9280_10_OR_LATER(ah)) {
		ath9k_hw_ar9280_set_channel(ah, chan);
	} else {
		if (!(ath9k_hw_set_channel(ah, chan))) {
	if (AR_SREV_9280_10_OR_LATER(ah))
		r = ath9k_hw_ar9280_set_channel(ah, chan);
	else
		r = ath9k_hw_set_channel(ah, chan);
	if (r) {
		ath_print(common, ATH_DBG_FATAL,
			  "Failed to set channel\n");
		return false;
	}
	}

	ah->eep_ops->set_txpower(ah, chan,
			     ath9k_regd_get_ctl(regulatory, chan),
@@ -2534,10 +2535,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
	REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);

	if (AR_SREV_9280_10_OR_LATER(ah))
		ath9k_hw_ar9280_set_channel(ah, chan);
		r = ath9k_hw_ar9280_set_channel(ah, chan);
	else
		if (!(ath9k_hw_set_channel(ah, chan)))
			return -EIO;
		r = ath9k_hw_set_channel(ah, chan);
	if (r)
		return r;

	for (i = 0; i < AR_NUM_DCU; i++)
		REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
+7 −7
Original line number Diff line number Diff line
@@ -68,8 +68,7 @@ ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, u32 freqIndex,
 * the channel value. Assumes writes enabled to analog bus and bank6 register
 * cache in ah->analogBank6Data.
 */
bool
ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
{
	struct ath_common *common = ath9k_hw_common(ah);
	u32 channelSel = 0;
@@ -94,7 +93,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
		} else {
			ath_print(common, ATH_DBG_FATAL,
				  "Invalid channel %u MHz\n", freq);
			return false;
			return -EINVAL;
		}

		channelSel = (channelSel << 2) & 0xff;
@@ -127,7 +126,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
	} else {
		ath_print(common, ATH_DBG_FATAL,
			  "Invalid channel %u MHz\n", freq);
		return false;
		return -EINVAL;
	}

	reg32 =
@@ -139,7 +138,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
	ah->curchan = chan;
	ah->curchan_rad_index = -1;

	return true;
	return 0;
}

/**
@@ -163,8 +162,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
 * (freq_ref = 40MHz/(24>>amodeRefSel))
 */
void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
				 struct ath9k_channel *chan)
int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
{
	u16 bMode, fracMode, aModeRefSel = 0;
	u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@@ -252,6 +250,8 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,

	ah->curchan = chan;
	ah->curchan_rad_index = -1;

	return 0;
}

/**
+2 −5
Original line number Diff line number Diff line
@@ -17,11 +17,8 @@
#ifndef PHY_H
#define PHY_H

void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
				 struct ath9k_channel
				 *chan);
bool ath9k_hw_set_channel(struct ath_hw *ah,
			  struct ath9k_channel *chan);
int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
void ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex,
			 u32 freqIndex, int regWrites);
bool ath9k_hw_set_rf_regs(struct ath_hw *ah,