Commit 0a27ff24 authored by Kang Luwei's avatar Kang Luwei Committed by Greg Kroah-Hartman
Browse files

fpga: dfl: fme: add header sub feature support 



The Header Register set is always present for FPGA Management Engine (FME),
this patch implements init and uinit function for header sub feature and
introduces several read-only sysfs interfaces for the capability and
status.

Sysfs interfaces:
* /sys/class/fpga_region/<regionX>/<dfl-fme.x>/ports_num
  Read-only. Number of ports implemented

* /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_id
  Read-only. Bitstream (static FPGA region) identifier number. It contains
  the detailed version and other information of this static FPGA region.

* /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_metadata
  Read-only. Bitstream (static FPGA region) meta data. It contains the
  synthesis date, seed and other information of this static FPGA region.

Signed-off-by: default avatarTim Whisonant <tim.whisonant@intel.com>
Signed-off-by: default avatarEnno Luebbers <enno.luebbers@intel.com>
Signed-off-by: default avatarShiva Rao <shiva.rao@intel.com>
Signed-off-by: default avatarChristopher Rauer <christopher.rauer@intel.com>
Signed-off-by: default avatarKang Luwei <luwei.kang@intel.com>
Signed-off-by: default avatarXiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: default avatarWu Hao <hao.wu@intel.com>
Acked-by: default avatarAlan Tull <atull@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 322ddebe

Documentation/ABI/testing/sysfs-platform-dfl-fme

0 → 100644
+23 −0
Original line number Diff line number Diff line 
What:		/sys/bus/platform/devices/dfl-fme.0/ports_num

Date:		June 2018

KernelVersion:  4.19

Contact:	Wu Hao <hao.wu@intel.com>

Description:	Read-only. One DFL FPGA device may have more than 1

		port/Accelerator Function Unit (AFU). It returns the

		number of ports on the FPGA device when read it.



What:		/sys/bus/platform/devices/dfl-fme.0/bitstream_id

Date:		June 2018

KernelVersion:  4.19

Contact:	Wu Hao <hao.wu@intel.com>

Description:	Read-only. It returns Bitstream (static FPGA region)

		identifier number, which includes the detailed version

		and other information of this static FPGA region.



What:		/sys/bus/platform/devices/dfl-fme.0/bitstream_metadata

Date:		June 2018

KernelVersion:  4.19

Contact:	Wu Hao <hao.wu@intel.com>

Description:	Read-only. It returns Bitstream (static FPGA region) meta

		data, which includes the synthesis date, seed and other

		information of this static FPGA region.

drivers/fpga/dfl-fme-main.c

+68 −0
Original line number Diff line number Diff line
@@ -19,10 +19,77 @@ 


#include "dfl.h"



static ssize_t ports_num_show(struct device *dev,

			      struct device_attribute *attr, char *buf)

{

	void __iomem *base;

	u64 v;



	base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);



	v = readq(base + FME_HDR_CAP);



	return scnprintf(buf, PAGE_SIZE, "%u\n",

			 (unsigned int)FIELD_GET(FME_CAP_NUM_PORTS, v));

}

static DEVICE_ATTR_RO(ports_num);



/*

 * Bitstream (static FPGA region) identifier number. It contains the

 * detailed version and other information of this static FPGA region.

 */

static ssize_t bitstream_id_show(struct device *dev,

				 struct device_attribute *attr, char *buf)

{

	void __iomem *base;

	u64 v;



	base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);



	v = readq(base + FME_HDR_BITSTREAM_ID);



	return scnprintf(buf, PAGE_SIZE, "0x%llx\n", (unsigned long long)v);

}

static DEVICE_ATTR_RO(bitstream_id);



/*

 * Bitstream (static FPGA region) meta data. It contains the synthesis

 * date, seed and other information of this static FPGA region.

 */

static ssize_t bitstream_metadata_show(struct device *dev,

				       struct device_attribute *attr, char *buf)

{

	void __iomem *base;

	u64 v;



	base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);



	v = readq(base + FME_HDR_BITSTREAM_MD);



	return scnprintf(buf, PAGE_SIZE, "0x%llx\n", (unsigned long long)v);

}

static DEVICE_ATTR_RO(bitstream_metadata);



static const struct attribute *fme_hdr_attrs[] = {

	&dev_attr_ports_num.attr,

	&dev_attr_bitstream_id.attr,

	&dev_attr_bitstream_metadata.attr,

	NULL,

};



static int fme_hdr_init(struct platform_device *pdev,

			struct dfl_feature *feature)

{

	void __iomem *base = feature->ioaddr;

	int ret;



	dev_dbg(&pdev->dev, "FME HDR Init.\n");

	dev_dbg(&pdev->dev, "FME cap %llx.\n",

		(unsigned long long)readq(base + FME_HDR_CAP));



	ret = sysfs_create_files(&pdev->dev.kobj, fme_hdr_attrs);

	if (ret)

		return ret;



	return 0;

}
@@ -31,6 +98,7 @@ static void fme_hdr_uinit(struct platform_device *pdev, 
			  struct dfl_feature *feature)

{

	dev_dbg(&pdev->dev, "FME HDR UInit.\n");

	sysfs_remove_files(&pdev->dev.kobj, fme_hdr_attrs);

}



static const struct dfl_feature_ops fme_hdr_ops = {

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