Commit 09dc68d9 authored by Jan Beulich's avatar Jan Beulich Committed by Ingo Molnar
Browse files

x86/cpu: Track legacy CPU model data only on 32-bit kernels 



struct cpu_dev's c_models is only ever set inside CONFIG_X86_32
conditionals (or code that's being built for 32-bit only), so
there's no use of reserving the (empty) space for the model
names in a 64-bit kernel.

Similarly, c_size_cache is only used in the #else of a
CONFIG_X86_64 conditional, so reserving space for (and in one
case even initializing) that field is pointless for 64-bit
kernels too.

While moving both fields to the end of the structure, I also
noticed that:

 - the c_models array size was one too small, potentially causing
   table_lookup_model() to return garbage on Intel CPUs (intel.c's
   instance was lacking the sentinel with family being zero), so the
   patch bumps that by one,

 - c_models' vendor sub-field was unused (and anyway redundant
   with the base structure's c_x86_vendor field), so the patch deletes it.

Also rename the legacy fields so that their legacy nature stands out
and comment their declarations.

Signed-off-by: default avatarJan Beulich <jbeulich@suse.com>
Link: http://lkml.kernel.org/r/5265036802000078000FC4DB@nat28.tlf.novell.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 88829dfe

arch/x86/kernel/cpu/amd.c

+3 −3
Original line number Diff line number Diff line
@@ -823,8 +823,8 @@ static const struct cpu_dev amd_cpu_dev = { 
	.c_vendor	= "AMD",

	.c_ident	= { "AuthenticAMD" },

#ifdef CONFIG_X86_32

	.c_models = {

		{ .vendor = X86_VENDOR_AMD, .family = 4, .model_names =

	.legacy_models = {

		{ .family = 4, .model_names =

		  {

			  [3] = "486 DX/2",

			  [7] = "486 DX/2-WB",
@@ -835,7 +835,7 @@ static const struct cpu_dev amd_cpu_dev = { 
		  }

		},

	},

	.c_size_cache	= amd_size_cache,

	.legacy_cache_size = amd_size_cache,

#endif

	.c_early_init   = early_init_amd,

	.c_detect_tlb	= cpu_detect_tlb_amd,

arch/x86/kernel/cpu/centaur.c

+5 −3
Original line number Diff line number Diff line
@@ -468,10 +468,10 @@ static void init_centaur(struct cpuinfo_x86 *c) 
#endif

}



#ifdef CONFIG_X86_32

static unsigned int

centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)

{

#ifdef CONFIG_X86_32

	/* VIA C3 CPUs (670-68F) need further shifting. */

	if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8)))

		size >>= 8;
@@ -484,16 +484,18 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size) 
	if ((c->x86 == 6) && (c->x86_model == 9) &&

				(c->x86_mask == 1) && (size == 65))

		size -= 1;

#endif

	return size;

}

#endif



static const struct cpu_dev centaur_cpu_dev = {

	.c_vendor	= "Centaur",

	.c_ident	= { "CentaurHauls" },

	.c_early_init	= early_init_centaur,

	.c_init		= init_centaur,

	.c_size_cache	= centaur_size_cache,

#ifdef CONFIG_X86_32

	.legacy_cache_size = centaur_size_cache,

#endif

	.c_x86_vendor	= X86_VENDOR_CENTAUR,

};

arch/x86/kernel/cpu/common.c

+7 −5
Original line number Diff line number Diff line
@@ -346,7 +346,8 @@ static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) 
/* Look up CPU names by table lookup. */

static const char *table_lookup_model(struct cpuinfo_x86 *c)

{

	const struct cpu_model_info *info;

#ifdef CONFIG_X86_32

	const struct legacy_cpu_model_info *info;



	if (c->x86_model >= 16)

		return NULL;	/* Range check */
@@ -354,13 +355,14 @@ static const char *table_lookup_model(struct cpuinfo_x86 *c) 
	if (!this_cpu)

		return NULL;



	info = this_cpu->c_models;

	info = this_cpu->legacy_models;



	while (info && info->family) {

	while (info->family) {

		if (info->family == c->x86)

			return info->model_names[c->x86_model];

		info++;

	}

#endif

	return NULL;		/* Not found */

}
@@ -450,8 +452,8 @@ void cpu_detect_cache_sizes(struct cpuinfo_x86 *c) 
	c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);

#else

	/* do processor-specific cache resizing */

	if (this_cpu->c_size_cache)

		l2size = this_cpu->c_size_cache(c, l2size);

	if (this_cpu->legacy_cache_size)

		l2size = this_cpu->legacy_cache_size(c, l2size);



	/* Allow user to override all this if necessary. */

	if (cachesize_override != -1)

arch/x86/kernel/cpu/cpu.h

+11 −9
Original line number Diff line number Diff line 
#ifndef ARCH_X86_CPU_H

#define ARCH_X86_CPU_H



struct cpu_model_info {

	int		vendor;

	int		family;

	const char	*model_names[16];

};



/* attempt to consolidate cpu attributes */

struct cpu_dev {

	const char	*c_vendor;
@@ -14,15 +8,23 @@ struct cpu_dev { 
	/* some have two possibilities for cpuid string */

	const char	*c_ident[2];



	struct		cpu_model_info c_models[4];



	void            (*c_early_init)(struct cpuinfo_x86 *);

	void		(*c_bsp_init)(struct cpuinfo_x86 *);

	void		(*c_init)(struct cpuinfo_x86 *);

	void		(*c_identify)(struct cpuinfo_x86 *);

	void		(*c_detect_tlb)(struct cpuinfo_x86 *);

	unsigned int	(*c_size_cache)(struct cpuinfo_x86 *, unsigned int);

	int		c_x86_vendor;

#ifdef CONFIG_X86_32

	/* Optional vendor specific routine to obtain the cache size. */

	unsigned int	(*legacy_cache_size)(struct cpuinfo_x86 *,

					     unsigned int);



	/* Family/stepping-based lookup table for model names. */

	struct legacy_cpu_model_info {

		int		family;

		const char	*model_names[16];

	}		legacy_models[5];

#endif

};



struct _tlb_table {

arch/x86/kernel/cpu/intel.c

+6 −6
Original line number Diff line number Diff line
@@ -665,8 +665,8 @@ static const struct cpu_dev intel_cpu_dev = { 
	.c_vendor	= "Intel",

	.c_ident	= { "GenuineIntel" },

#ifdef CONFIG_X86_32

	.c_models = {

		{ .vendor = X86_VENDOR_INTEL, .family = 4, .model_names =

	.legacy_models = {

		{ .family = 4, .model_names =

		  {

			  [0] = "486 DX-25/33",

			  [1] = "486 DX-50",
@@ -679,7 +679,7 @@ static const struct cpu_dev intel_cpu_dev = { 
			  [9] = "486 DX/4-WB"

		  }

		},

		{ .vendor = X86_VENDOR_INTEL, .family = 5, .model_names =

		{ .family = 5, .model_names =

		  {

			  [0] = "Pentium 60/66 A-step",

			  [1] = "Pentium 60/66",
@@ -690,7 +690,7 @@ static const struct cpu_dev intel_cpu_dev = { 
			  [8] = "Mobile Pentium MMX"

		  }

		},

		{ .vendor = X86_VENDOR_INTEL, .family = 6, .model_names =

		{ .family = 6, .model_names =

		  {

			  [0] = "Pentium Pro A-step",

			  [1] = "Pentium Pro",
@@ -704,7 +704,7 @@ static const struct cpu_dev intel_cpu_dev = { 
			  [11] = "Pentium III (Tualatin)",

		  }

		},

		{ .vendor = X86_VENDOR_INTEL, .family = 15, .model_names =

		{ .family = 15, .model_names =

		  {

			  [0] = "Pentium 4 (Unknown)",

			  [1] = "Pentium 4 (Willamette)",
@@ -714,7 +714,7 @@ static const struct cpu_dev intel_cpu_dev = { 
		  }

		},

	},

	.c_size_cache	= intel_size_cache,

	.legacy_cache_size = intel_size_cache,

#endif

	.c_detect_tlb	= intel_detect_tlb,

	.c_early_init   = early_init_intel,

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