Commit 09b22c85 authored by Jaswinder Singh Rajput's avatar Jaswinder Singh Rajput Committed by Ingo Molnar
Browse files

x86: Clean up mtrr/state.c 



Fix:

  WARNING: Use #include <linux/io.h> instead of <asm/io.h>
  WARNING: line over 80 characters X 4

arch/x86/kernel/cpu/mtrr/state.o:

   text	   data	    bss	    dec	    hex	filename
    864	      0	      0	    864	    360	state.o.before
    864	      0	      0	    864	    360	state.o.after

md5:
   c5c4364b9aeac74d70111e1e49667a2c  state.o.before.asm
   c5c4364b9aeac74d70111e1e49667a2c  state.o.after.asm

Suggested-by: default avatarAlan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: default avatarJaswinder Singh Rajput <jaswinderrajput@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <20090703164225.GA21447@elte.hu>
[ More cleanups ]
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 3ec8dbcb

arch/x86/kernel/cpu/mtrr/state.c

+40 −28
Original line number Diff line number Diff line 
#include <linux/mm.h>

#include <linux/init.h>

#include <asm/io.h>

#include <asm/mtrr.h>

#include <asm/msr.h>

#include <linux/io.h>

#include <linux/mm.h>



#include <asm/processor-cyrix.h>

#include <asm/processor-flags.h>

#include "mtrr.h"

#include <asm/mtrr.h>

#include <asm/msr.h>



#include "mtrr.h"



/* Put the processor into a state where MTRRs can be safely set */

void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
@@ -33,25 +34,32 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt) 
		write_cr0(cr0);

		wbinvd();



		if (use_intel())

		if (use_intel()) {

			/* Save MTRR state */

			rdmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi);

		else

			/* Cyrix ARRs - everything else were excluded at the top */

		} else {

			/*

			 * Cyrix ARRs -

			 * everything else were excluded at the top

			 */

			ctxt->ccr3 = getCx86(CX86_CCR3);

		}

	}

}



void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)

{

	if (use_intel())

	if (use_intel()) {

		/* Disable MTRRs, and set the default type to uncached */

		mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo & 0xf300UL,

		      ctxt->deftype_hi);

	else if (is_cpu(CYRIX))

	} else {

		if (is_cpu(CYRIX)) {

			/* Cyrix ARRs - everything else were excluded at the top */

			setCx86(CX86_CCR3, (ctxt->ccr3 & 0x0f) | 0x10);

		}

	}

}



/* Restore the processor after a set_mtrr_prepare */

void set_mtrr_done(struct set_mtrr_context *ctxt)
@@ -62,12 +70,17 @@ void set_mtrr_done(struct set_mtrr_context *ctxt) 
		wbinvd();



		/* Restore MTRRdefType */

		if (use_intel())

		if (use_intel()) {

			/* Intel (P6) standard MTRRs */

			mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi);

		else

			/* Cyrix ARRs - everything else was excluded at the top */

			mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo,

				   ctxt->deftype_hi);

		} else {

			/*

			 * Cyrix ARRs -

			 * everything else was excluded at the top

			 */

			setCx86(CX86_CCR3, ctxt->ccr3);

		}



		/* Enable caches */

		write_cr0(read_cr0() & 0xbfffffff);
@@ -79,4 +92,3 @@ void set_mtrr_done(struct set_mtrr_context *ctxt) 
	/* Re-enable interrupts locally (if enabled previously) */

	local_irq_restore(ctxt->flags);

}

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