Commit 099d66e4 authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher
Browse files

drm/amdgpu: add PG and CG for JPEG2.0 



And enable them for Navi1x and Renoir

Signed-off-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 18e6d414

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

+36 −26
Original line number Diff line number Diff line
@@ -227,6 +227,7 @@ static int jpeg_v2_0_disable_power_gating(struct amdgpu_device *adev) 
	uint32_t data;

	int r = 0;



	if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {

		data = 1 << UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT;

		WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_PGFSM_CONFIG), data);
@@ -238,6 +239,7 @@ static int jpeg_v2_0_disable_power_gating(struct amdgpu_device *adev) 
			DRM_ERROR("amdgpu: JPEG disable power gating failed\n");

			return r;

		}

	}



	/* Removing the anti hang mechanism to indicate the UVDJ tile is ON */

	data = RREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_POWER_STATUS)) & ~0x1;
@@ -248,6 +250,7 @@ static int jpeg_v2_0_disable_power_gating(struct amdgpu_device *adev) 


static int jpeg_v2_0_enable_power_gating(struct amdgpu_device* adev)

{

	if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {

		uint32_t data;

		int r = 0;
@@ -267,6 +270,7 @@ static int jpeg_v2_0_enable_power_gating(struct amdgpu_device* adev) 
			DRM_ERROR("amdgpu: JPEG enable power gating failed\n");

			return r;

		}

	}



	return 0;

}
@@ -276,7 +280,10 @@ static void jpeg_v2_0_disable_clock_gating(struct amdgpu_device* adev) 
	uint32_t data;



	data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL);

	if (adev->cg_flags & AMD_CG_SUPPORT_JPEG_MGCG)

		data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;

	else

		data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;



	data |= 1 << JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;

	data |= 4 << JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT;
@@ -296,7 +303,10 @@ static void jpeg_v2_0_enable_clock_gating(struct amdgpu_device* adev) 
	uint32_t data;



	data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL);

	if (adev->cg_flags & AMD_CG_SUPPORT_JPEG_MGCG)

		data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;

	else

		data |= 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;



	data |= 1 << JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;

	data |= 4 << JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT;

drivers/gpu/drm/amd/amdgpu/nv.c

+7 −1
Original line number Diff line number Diff line
@@ -636,10 +636,12 @@ static int nv_common_early_init(void *handle) 
			AMD_CG_SUPPORT_ATHUB_MGCG |

			AMD_CG_SUPPORT_ATHUB_LS |

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG |

			AMD_CG_SUPPORT_BIF_MGCG |

			AMD_CG_SUPPORT_BIF_LS;

		adev->pg_flags = AMD_PG_SUPPORT_VCN |

			AMD_PG_SUPPORT_VCN_DPG |

			AMD_PG_SUPPORT_JPEG |

			AMD_PG_SUPPORT_ATHUB;

		adev->external_rev_id = adev->rev_id + 0x1;

		break;
@@ -656,9 +658,11 @@ static int nv_common_early_init(void *handle) 
			AMD_CG_SUPPORT_ATHUB_MGCG |

			AMD_CG_SUPPORT_ATHUB_LS |

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG |

			AMD_CG_SUPPORT_BIF_MGCG |

			AMD_CG_SUPPORT_BIF_LS;

		adev->pg_flags = AMD_PG_SUPPORT_VCN |

			AMD_PG_SUPPORT_JPEG |

			AMD_PG_SUPPORT_VCN_DPG;

		adev->external_rev_id = adev->rev_id + 20;

		break;
@@ -677,9 +681,11 @@ static int nv_common_early_init(void *handle) 
			AMD_CG_SUPPORT_MC_LS |

			AMD_CG_SUPPORT_ATHUB_MGCG |

			AMD_CG_SUPPORT_ATHUB_LS |

			AMD_CG_SUPPORT_VCN_MGCG;

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG;

		adev->pg_flags = AMD_PG_SUPPORT_VCN |

			AMD_PG_SUPPORT_VCN_DPG |

			AMD_PG_SUPPORT_JPEG |

			AMD_PG_SUPPORT_ATHUB;

		adev->external_rev_id = adev->rev_id + 0xa;

		break;

drivers/gpu/drm/amd/amdgpu/soc15.c

+2 −0
Original line number Diff line number Diff line
@@ -1229,12 +1229,14 @@ static int soc15_common_early_init(void *handle) 
				 AMD_CG_SUPPORT_HDP_LS |

				 AMD_CG_SUPPORT_ROM_MGCG |

				 AMD_CG_SUPPORT_VCN_MGCG |

				 AMD_CG_SUPPORT_JPEG_MGCG |

				 AMD_CG_SUPPORT_IH_CG |

				 AMD_CG_SUPPORT_ATHUB_LS |

				 AMD_CG_SUPPORT_ATHUB_MGCG |

				 AMD_CG_SUPPORT_DF_MGCG;

		adev->pg_flags = AMD_PG_SUPPORT_SDMA |

				 AMD_PG_SUPPORT_VCN |

				 AMD_PG_SUPPORT_JPEG |

				 AMD_PG_SUPPORT_VCN_DPG;

		adev->external_rev_id = adev->rev_id + 0x91;

		break;

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