drm/amd/powerplay: support sysfs to get socclk, fclk, dcefclk (09676101) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+9 −3

Original line number	Diff line number	Diff line
		@@ -906,7 +906,9 @@ static ssize_t amdgpu_get_pp_dpm_socclk(struct device *dev,
		struct drm_device *ddev = dev_get_drvdata(dev);
		struct amdgpu_device *adev = ddev->dev_private;

		if (adev->powerplay.pp_funcs->print_clock_levels)
		if (is_support_sw_smu(adev))
		return smu_print_clk_levels(&adev->smu, PP_SOCCLK, buf);
		else if (adev->powerplay.pp_funcs->print_clock_levels)
		return amdgpu_dpm_print_clock_levels(adev, PP_SOCCLK, buf);
		else
		return snprintf(buf, PAGE_SIZE, "\n");
		@@ -942,7 +944,9 @@ static ssize_t amdgpu_get_pp_dpm_fclk(struct device *dev,
		struct drm_device *ddev = dev_get_drvdata(dev);
		struct amdgpu_device *adev = ddev->dev_private;

		if (adev->powerplay.pp_funcs->print_clock_levels)
		if (is_support_sw_smu(adev))
		return smu_print_clk_levels(&adev->smu, PP_FCLK, buf);
		else if (adev->powerplay.pp_funcs->print_clock_levels)
		return amdgpu_dpm_print_clock_levels(adev, PP_FCLK, buf);
		else
		return snprintf(buf, PAGE_SIZE, "\n");
		@@ -978,7 +982,9 @@ static ssize_t amdgpu_get_pp_dpm_dcefclk(struct device *dev,
		struct drm_device *ddev = dev_get_drvdata(dev);
		struct amdgpu_device *adev = ddev->dev_private;

		if (adev->powerplay.pp_funcs->print_clock_levels)
		if (is_support_sw_smu(adev))
		return smu_print_clk_levels(&adev->smu, PP_DCEFCLK, buf);
		else if (adev->powerplay.pp_funcs->print_clock_levels)
		return amdgpu_dpm_print_clock_levels(adev, PP_DCEFCLK, buf);
		else
		return snprintf(buf, PAGE_SIZE, "\n");

drivers/gpu/drm/amd/powerplay/vega20_ppt.c

+56 −0

Original line number	Diff line number	Diff line
		@@ -773,6 +773,62 @@ static int vega20_print_clk_levels(struct smu_context *smu,
		? "*" : "");
		break;

		case PP_SOCCLK:
		ret = smu_get_current_clk_freq(smu, PPCLK_SOCCLK, &now);
		if (ret) {
		pr_err("Attempt to get current socclk Failed!");
		return ret;
		}

		single_dpm_table = &(dpm_table->soc_table);
		ret = vega20_get_clk_table(smu, &clocks, single_dpm_table);
		if (ret) {
		pr_err("Attempt to get socclk levels Failed!");
		return ret;
		}

		for (i = 0; i < clocks.num_levels; i++)
		size += sprintf(buf + size, "%d: %uMhz %s\n",
		i, clocks.data[i].clocks_in_khz / 1000,
		(clocks.data[i].clocks_in_khz == now * 10)
		? "*" : "");
		break;

		case PP_FCLK:
		ret = smu_get_current_clk_freq(smu, PPCLK_FCLK, &now);
		if (ret) {
		pr_err("Attempt to get current fclk Failed!");
		return ret;
		}

		single_dpm_table = &(dpm_table->fclk_table);
		for (i = 0; i < single_dpm_table->count; i++)
		size += sprintf(buf + size, "%d: %uMhz %s\n",
		i, single_dpm_table->dpm_levels[i].value,
		(single_dpm_table->dpm_levels[i].value == now / 100)
		? "*" : "");
		break;

		case PP_DCEFCLK:
		ret = smu_get_current_clk_freq(smu, PPCLK_DCEFCLK, &now);
		if (ret) {
		pr_err("Attempt to get current dcefclk Failed!");
		return ret;
		}

		single_dpm_table = &(dpm_table->dcef_table);
		ret = vega20_get_clk_table(smu, &clocks, single_dpm_table);
		if (ret) {
		pr_err("Attempt to get dcefclk levels Failed!");
		return ret;
		}

		for (i = 0; i < clocks.num_levels; i++)
		size += sprintf(buf + size, "%d: %uMhz %s\n",
		i, clocks.data[i].clocks_in_khz / 1000,
		(clocks.data[i].clocks_in_khz == now * 10) ? "*" : "");
		break;

		case PP_PCIE:
		break;

Admin message