Commit 0956dcb8 authored by Jim Quinlan's avatar Jim Quinlan Committed by Lorenzo Pieralisi
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dt-bindings: PCI: Add bindings for brcmstb's PCIe device



The DT bindings description of the brcmstb PCIe device is described.
This node can only be used for now on the Raspberry Pi 4.

Signed-off-by: default avatarJim Quinlan <james.quinlan@broadcom.com>
Co-developed-by: default avatarNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: default avatarNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarAndrew Murray <andrew.murray@arm.com>
parent e42617b8
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Brcmstb PCIe Host Controller Device Tree Bindings

maintainers:
  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

allOf:
  - $ref: /schemas/pci/pci-bus.yaml#

properties:
  compatible:
    const: brcm,bcm2711-pcie # The Raspberry Pi 4

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 2
    items:
      - description: PCIe host controller
      - description: builtin MSI controller

  interrupt-names:
    minItems: 1
    maxItems: 2
    items:
      - const: pcie
      - const: msi

  ranges:
    maxItems: 1

  dma-ranges:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: sw_pcie

  msi-controller:
    description: Identifies the node as an MSI controller.

  msi-parent:
    description: MSI controller the device is capable of using.

  brcm,enable-ssc:
    description: Indicates usage of spread-spectrum clocking.
    type: boolean

required:
  - reg
  - dma-ranges
  - "#interrupt-cells"
  - interrupts
  - interrupt-names
  - interrupt-map-mask
  - interrupt-map
  - msi-controller

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    scb {
            #address-cells = <2>;
            #size-cells = <1>;
            pcie0: pcie@7d500000 {
                    compatible = "brcm,bcm2711-pcie";
                    reg = <0x0 0x7d500000 0x9310>;
                    device_type = "pci";
                    #address-cells = <3>;
                    #size-cells = <2>;
                    #interrupt-cells = <1>;
                    interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
                    interrupt-names = "pcie", "msi";
                    interrupt-map-mask = <0x0 0x0 0x0 0x7>;
                    interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
                    msi-parent = <&pcie0>;
                    msi-controller;
                    ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
                    dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
                    brcm,enable-ssc;
            };
    };