Commit 0928df0a authored by Johannes Berg's avatar Johannes Berg Committed by Luca Coelho
Browse files

iwlwifi: mvm: tell firmware about required LTR delay



Some (integrated) devices need a longer LTR delay than the firmware
would typically apply, tell it about that.

Signed-off-by: default avatarJohannes Berg <johannes.berg@intel.com>
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
Link: https://lore.kernel.org/r/iwlwifi.20200418110539.24276ae2ad61.I8831a538f75893d5cee47b4a81f4b9b7fd0e8bea@changeid
parent 2d39683e
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+2 −0
Original line number Diff line number Diff line
@@ -243,6 +243,7 @@ const struct iwl_cfg_trans_params iwl_qu_trans_cfg = {
	.base_params = &iwl_22000_base_params,
	.integrated = true,
	.xtal_latency = 5000,
	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US,
};

const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = {
@@ -255,6 +256,7 @@ const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = {
	.integrated = true,
	.xtal_latency = 12000,
	.low_latency_xtal = true,
	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
};

const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = {
+8 −4
Original line number Diff line number Diff line
@@ -5,10 +5,9 @@
 *
 * GPL LICENSE SUMMARY
 *
 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
 * Copyright(c) 2019        Intel Deutschland GmbH
 * Copyright(c) 2012 - 2014, 2019 - 2020 Intel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
@@ -28,10 +27,9 @@
 *
 * BSD LICENSE
 *
 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
 * Copyright(c) 2019        Intel Deutschland GmbH
 * Copyright(c) 2012 - 2014, 2019 - 2020 Intel Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
@@ -68,6 +66,12 @@
#define SOC_CONFIG_CMD_FLAGS_DISCRETE		BIT(0)
#define SOC_CONFIG_CMD_FLAGS_LOW_LATENCY	BIT(1)

#define SOC_FLAGS_LTR_APPLY_DELAY_MASK		0xc
#define SOC_FLAGS_LTR_APPLY_DELAY_NONE		0
#define SOC_FLAGS_LTR_APPLY_DELAY_200		1
#define SOC_FLAGS_LTR_APPLY_DELAY_2500		2
#define SOC_FLAGS_LTR_APPLY_DELAY_1820		3

/**
 * struct iwl_soc_configuration_cmd - Set device stabilization latency
 *
+12 −5
Original line number Diff line number Diff line
@@ -5,9 +5,8 @@
 *
 * GPL LICENSE SUMMARY
 *
 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
 * Copyright(c) 2018 - 2019 Intel Corporation
 * Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
@@ -27,9 +26,8 @@
 *
 * BSD LICENSE
 *
 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
 * Copyright(c) 2018 - 2019 Intel Corporation
 * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
@@ -284,6 +282,13 @@ struct iwl_pwr_tx_backoff {
	u32 backoff;
};

enum iwl_cfg_trans_ltr_delay {
	IWL_CFG_TRANS_LTR_DELAY_NONE	= 0,
	IWL_CFG_TRANS_LTR_DELAY_200US	= 1,
	IWL_CFG_TRANS_LTR_DELAY_2500US	= 2,
	IWL_CFG_TRANS_LTR_DELAY_1820US	= 3,
};

/**
 * struct iwl_cfg_trans - information needed to start the trans
 *
@@ -304,6 +309,7 @@ struct iwl_pwr_tx_backoff {
 * @mq_rx_supported: multi-queue rx support
 * @integrated: discrete or integrated
 * @low_latency_xtal: use the low latency xtal if supported
 * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.
 */
struct iwl_cfg_trans_params {
	const struct iwl_base_params *base_params;
@@ -317,7 +323,8 @@ struct iwl_cfg_trans_params {
	    mq_rx_supported:1,
	    integrated:1,
	    low_latency_xtal:1,
	    bisr_workaround:1;
	    bisr_workaround:1,
	    ltr_delay:2;
};

/**
+14 −0
Original line number Diff line number Diff line
@@ -102,6 +102,20 @@ static int iwl_set_soc_latency(struct iwl_mvm *mvm)
	if (!mvm->trans->trans_cfg->integrated)
		cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE);

	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE !=
		     SOC_FLAGS_LTR_APPLY_DELAY_NONE);
	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US !=
		     SOC_FLAGS_LTR_APPLY_DELAY_200);
	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US !=
		     SOC_FLAGS_LTR_APPLY_DELAY_2500);
	BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US !=
		     SOC_FLAGS_LTR_APPLY_DELAY_1820);

	if (mvm->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE &&
	    !WARN_ON(!mvm->trans->trans_cfg->integrated))
		cmd.flags |= le32_encode_bits(mvm->trans->trans_cfg->ltr_delay,
					      SOC_FLAGS_LTR_APPLY_DELAY_MASK);

	if (iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
				  SCAN_REQ_UMAC) >= 2 &&
	    mvm->trans->trans_cfg->low_latency_xtal)