Commit 091bc3a4 authored Jul 13, 2015 by Paul Burton Committed by Ralf Baechle Apr 03, 2016

MIPS: tlb-r4k: panic if the MMU doesn't support PAGE_SIZE



After writing the appropriate mask to the cop0 PageMask register, read
the register back & check it matches what we want. If it doesn't then
the MMU does not support the page size the kernel is configured for and
we're better off bailing than continuing to do odd things with TLB
exceptions.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10691/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 8961b28f

arch/mips/mm/tlb-r4k.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -19,6 +19,7 @@
		#include <asm/cpu.h>
		#include <asm/cpu-type.h>
		#include <asm/bootinfo.h>
		#include <asm/hazards.h>
		#include <asm/mmu_context.h>
		#include <asm/pgtable.h>
		#include <asm/tlb.h>
		@@ -486,6 +487,10 @@ static void r4k_tlb_configure(void)
		* be set to fixed-size pages.
		*/
		write_c0_pagemask(PM_DEFAULT_MASK);
		back_to_back_c0_hazard();
		if (read_c0_pagemask() != PM_DEFAULT_MASK)
		panic("MMU doesn't support PAGE_SIZE=0x%lx", PAGE_SIZE);

		write_c0_wired(0);
		if (current_cpu_type() == CPU_R10000 \|\|
		current_cpu_type() == CPU_R12000 \|\|

Admin message