Commit 0900a9ef authored by Xiaojie Yuan's avatar Xiaojie Yuan Committed by Alex Deucher
Browse files

drm/amdgpu/gfx10: fix mqd backup/restore for gfx rings (v2) 



1. no need to allocate an extra member for 'mqd_backup' array
2. backup/restore mqd to/from the correct 'mqd_backup' array slot

v2: warning fix (Alex)

Signed-off-by: default avatarXiaojie Yuan <xiaojie.yuan@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 17eee668

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+1 −1
Original line number Diff line number Diff line
@@ -455,7 +455,7 @@ void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev) 


	ring = &adev->gfx.kiq.ring;

	if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring)

		kfree(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]);

		kfree(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS - 1]);

	kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]);

	amdgpu_bo_free_kernel(&ring->mqd_obj,

			      &ring->mqd_gpu_addr,

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+1 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ struct amdgpu_me { 
	uint32_t			num_me;

	uint32_t			num_pipe_per_me;

	uint32_t			num_queue_per_pipe;

	void				*mqd_backup[AMDGPU_MAX_GFX_RINGS + 1];

	void				*mqd_backup[AMDGPU_MAX_GFX_RINGS];



	/* These are the resources for which amdgpu takes ownership */

	DECLARE_BITMAP(queue_bitmap, AMDGPU_MAX_GFX_QUEUES);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+5 −4
Original line number Diff line number Diff line
@@ -3114,6 +3114,7 @@ static int gfx_v10_0_gfx_init_queue(struct amdgpu_ring *ring) 
{

	struct amdgpu_device *adev = ring->adev;

	struct v10_gfx_mqd *mqd = ring->mqd_ptr;

	int mqd_idx = ring - &adev->gfx.gfx_ring[0];



	if (!adev->in_gpu_reset && !adev->in_suspend) {

		memset((void *)mqd, 0, sizeof(*mqd));
@@ -3125,12 +3126,12 @@ static int gfx_v10_0_gfx_init_queue(struct amdgpu_ring *ring) 
#endif

		nv_grbm_select(adev, 0, 0, 0, 0);

		mutex_unlock(&adev->srbm_mutex);

		if (adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS])

			memcpy(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS], mqd, sizeof(*mqd));

		if (adev->gfx.me.mqd_backup[mqd_idx])

			memcpy(adev->gfx.me.mqd_backup[mqd_idx], mqd, sizeof(*mqd));

	} else if (adev->in_gpu_reset) {

		/* reset mqd with the backup copy */

		if (adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS])

			memcpy(mqd, adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS], sizeof(*mqd));

		if (adev->gfx.me.mqd_backup[mqd_idx])

			memcpy(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));

		/* reset the ring */

		ring->wptr = 0;

		adev->wb.wb[ring->wptr_offs] = 0;

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