Commit 08f48f32 authored by Alistair Popple's avatar Alistair Popple Committed by Michael Ellerman
Browse files

powerpc/powernv: Reserve PE#0 on NPU 



P8+ hardware reports all errors on PE#0. This patch ensures PE#0 is
not assigned to NPU devices so that it can be used for EEH.

Signed-off-by: default avatarAlistair Popple <alistair@popple.id.au>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent b521549a

arch/powerpc/platforms/powernv/pci-ioda.c

+4 −2
Original line number Diff line number Diff line
@@ -1186,9 +1186,11 @@ static void pnv_pci_ioda_setup_PEs(void) 
		 * functions. PCI bus dependent PEs are required for the

		 * remaining types of PHBs.

		 */

		if (phb->type == PNV_PHB_NPU)

		if (phb->type == PNV_PHB_NPU) {

			/* PE#0 is needed for error reporting */

			pnv_ioda_reserve_pe(phb, 0);

			pnv_ioda_setup_npu_PEs(hose->bus);

		else

		} else

			pnv_ioda_setup_PEs(hose->bus);

	}

}

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