Commit 08ccf572 authored by Hauke Mehrtens's avatar Hauke Mehrtens Committed by John W. Linville
Browse files

bcm47xx: prepare to support different buses 



Prepare bcm47xx to support different System buses. Before adding
support for bcma it should be possible to build bcm47xx without the
need of ssb. With this patch bcm47xx does not directly contain a
ssb_bus, but a union contain all the supported system buses. As a SoC
just uses one system bus a union is a good choice.

Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 908debc8

arch/mips/bcm47xx/gpio.c

+34 −22
Original line number Diff line number Diff line
@@ -20,11 +20,13 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); 


int gpio_request(unsigned gpio, const char *tag)

{

	if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&

		    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))

			return -EINVAL;



	if (ssb_extif_available(&ssb_bcm47xx.extif) &&

		if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&

		    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))

			return -EINVAL;
@@ -33,29 +35,39 @@ int gpio_request(unsigned gpio, const char *tag) 


		return 0;

	}

	return -EINVAL;

}

EXPORT_SYMBOL(gpio_request);



void gpio_free(unsigned gpio)

{

	if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&

		    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))

			return;



	if (ssb_extif_available(&ssb_bcm47xx.extif) &&

		if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&

		    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))

			return;



		clear_bit(gpio, gpio_in_use);

		return;

	}

}

EXPORT_SYMBOL(gpio_free);



int gpio_to_irq(unsigned gpio)

{

	if (ssb_chipco_available(&ssb_bcm47xx.chipco))

		return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;

	else if (ssb_extif_available(&ssb_bcm47xx.extif))

		return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco))

			return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2;

		else if (ssb_extif_available(&bcm47xx_bus.ssb.extif))

			return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2;

		else

			return -EINVAL;

	}

	return -EINVAL;

}

EXPORT_SYMBOL_GPL(gpio_to_irq);

arch/mips/bcm47xx/nvram.c

+11 −4
Original line number Diff line number Diff line
@@ -26,14 +26,21 @@ static char nvram_buf[NVRAM_SPACE]; 
/* Probe for NVRAM header */

static void early_nvram_init(void)

{

	struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;

	struct ssb_mipscore *mcore_ssb;

	struct nvram_header *header;

	int i;

	u32 base, lim, off;

	u32 base = 0;

	u32 lim = 0;

	u32 off;

	u32 *src, *dst;



	base = mcore->flash_window;

	lim = mcore->flash_window_size;

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		mcore_ssb = &bcm47xx_bus.ssb.mipscore;

		base = mcore_ssb->flash_window;

		lim = mcore_ssb->flash_window_size;

		break;

	}



	off = FLASH_MIN;

	while (off <= lim) {

arch/mips/bcm47xx/serial.c

+11 −2
Original line number Diff line number Diff line
@@ -23,10 +23,10 @@ static struct platform_device uart8250_device = { 
	},

};



static int __init uart8250_init(void)

static int __init uart8250_init_ssb(void)

{

	int i;

	struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);

	struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore);



	memset(&uart8250_data, 0,  sizeof(uart8250_data));
@@ -45,6 +45,15 @@ static int __init uart8250_init(void) 
	return platform_device_register(&uart8250_device);

}



static int __init uart8250_init(void)

{

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		return uart8250_init_ssb();

	}

	return -EINVAL;

}



module_init(uart8250_init);



MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");

arch/mips/bcm47xx/setup.c

+26 −7
Original line number Diff line number Diff line
@@ -35,15 +35,22 @@ 
#include <bcm47xx.h>

#include <asm/mach-bcm47xx/nvram.h>



struct ssb_bus ssb_bcm47xx;

EXPORT_SYMBOL(ssb_bcm47xx);

union bcm47xx_bus bcm47xx_bus;

EXPORT_SYMBOL(bcm47xx_bus);



enum bcm47xx_bus_type bcm47xx_bus_type;

EXPORT_SYMBOL(bcm47xx_bus_type);



static void bcm47xx_machine_restart(char *command)

{

	printk(KERN_ALERT "Please stand by while rebooting the system...\n");

	local_irq_disable();

	/* Set the watchdog timer to reset immediately */

	ssb_watchdog_timer_set(&ssb_bcm47xx, 1);

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);

		break;

	}

	while (1)

		cpu_relax();

}
@@ -52,7 +59,11 @@ static void bcm47xx_machine_halt(void) 
{

	/* Disable interrupts and watchdog and spin forever */

	local_irq_disable();

	ssb_watchdog_timer_set(&ssb_bcm47xx, 0);

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);

		break;

	}

	while (1)

		cpu_relax();

}
@@ -247,7 +258,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus, 
	return 0;

}



void __init plat_mem_setup(void)

static void __init bcm47xx_register_ssb(void)

{

	int err;

	char buf[100];
@@ -258,12 +269,12 @@ void __init plat_mem_setup(void) 
		printk(KERN_WARNING "bcm47xx: someone else already registered"

			" a ssb SPROM callback handler (err %d)\n", err);



	err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,

	err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,

				      bcm47xx_get_invariants);

	if (err)

		panic("Failed to initialize SSB bus (err %d)\n", err);



	mcore = &ssb_bcm47xx.mipscore;

	mcore = &bcm47xx_bus.ssb.mipscore;

	if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {

		if (strstr(buf, "console=ttyS1")) {

			struct ssb_serial_port port;
@@ -276,6 +287,14 @@ void __init plat_mem_setup(void) 
			memcpy(&mcore->serial_ports[1], &port, sizeof(port));

		}

	}

}



void __init plat_mem_setup(void)

{

	struct cpuinfo_mips *c = &current_cpu_data;



	bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;

	bcm47xx_register_ssb();



	_machine_restart = bcm47xx_machine_restart;

	_machine_halt = bcm47xx_machine_halt;

arch/mips/bcm47xx/time.c

+7 −2
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ 


void __init plat_time_init(void)

{

	unsigned long hz;

	unsigned long hz = 0;



	/*

	 * Use deterministic values for initial counter interrupt
@@ -39,7 +39,12 @@ void __init plat_time_init(void) 
	write_c0_count(0);

	write_c0_compare(0xffff);



	hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;

	switch (bcm47xx_bus_type) {

	case BCM47XX_BUS_TYPE_SSB:

		hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;

		break;

	}



	if (!hz)

		hz = 100000000;

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