Commit 08be9796 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86: Force HPET readback_cmp for all ATI chipsets 



commit 30a564be (x86, hpet: Restrict read back to affected ATI
chipset) restricted the workaround for the HPET bug to SMX00
chipsets. This was reasonable as those were the only ones against
which we ever got a bug report.

Stephan Wolf reported now that this patch breaks his IXP400 based
machine. Though it's confirmed to work on other IXP400 based systems.

To error out on the safe side, we force the HPET readback workaround
for all ATI SMbus class chipsets.

Reported-by: default avatarStephan Wolf <stephan@letzte-bankreihe.de>
LKML-Reference: <alpine.LFD.2.00.1007142134140.3321@localhost.localdomain>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarStephan Wolf <stephan@letzte-bankreihe.de>
Acked-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
parent 2f7989ef

arch/x86/kernel/early-quirks.c

+18 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <asm/apic.h>

#include <asm/iommu.h>

#include <asm/gart.h>

#include <asm/hpet.h>



static void __init fix_hypertransport_config(int num, int slot, int func)

{
@@ -191,6 +192,21 @@ static void __init ati_bugs_contd(int num, int slot, int func) 
}

#endif



/*

 * Force the read back of the CMP register in hpet_next_event()

 * to work around the problem that the CMP register write seems to be

 * delayed. See hpet_next_event() for details.

 *

 * We do this on all SMBUS incarnations for now until we have more

 * information about the affected chipsets.

 */

static void __init ati_hpet_bugs(int num, int slot, int func)

{

#ifdef CONFIG_HPET_TIMER

	hpet_readback_cmp = 1;

#endif

}



#define QFLAG_APPLY_ONCE 	0x1

#define QFLAG_APPLIED		0x2

#define QFLAG_DONE		(QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -220,6 +236,8 @@ static struct chipset early_qrk[] __initdata = { 
	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },

	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,

	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },

	{ PCI_VENDOR_ID_ATI, PCI_ANY_ID,

	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_hpet_bugs },

	{}

};

arch/x86/kernel/quirks.c

+0 −5
Original line number Diff line number Diff line
@@ -498,15 +498,10 @@ void force_hpet_resume(void) 
 * See erratum #27 (Misinterpreted MSI Requests May Result in

 * Corrupted LPC DMA Data) in AMD Publication #46837,

 * "SB700 Family Product Errata", Rev. 1.0, March 2010.

 *

 * Also force the read back of the CMP register in hpet_next_event()

 * to work around the problem that the CMP register write seems to be

 * delayed. See hpet_next_event() for details.

 */

static void force_disable_hpet_msi(struct pci_dev *unused)

{

	hpet_msi_disable = 1;

	hpet_readback_cmp = 1;

}



DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,

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