sis7019: increase reset delays (08b45098) · Commits · 戴 / test

A few boards using this controller are reported to need a little extra time during their reset cycle. Reported-by:

sound/pci/sis7019.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -1049,7 +1049,7 @@ static int sis_chip_free(struct sis7019 *sis)
		/* Reset the chip, and disable all interrputs.
		*/
		outl(SIS_GCR_SOFTWARE_RESET, sis->ioport + SIS_GCR);
		udelay(10);
		udelay(25);
		outl(0, sis->ioport + SIS_GCR);
		outl(0, sis->ioport + SIS_GIER);

		@@ -1085,7 +1085,7 @@ static int sis_chip_init(struct sis7019 *sis)
		/* Reset the audio controller
		*/
		outl(SIS_GCR_SOFTWARE_RESET, io + SIS_GCR);
		udelay(10);
		udelay(25);
		outl(0, io + SIS_GCR);

		/* Get the AC-link semaphore, and reset the codecs
		@@ -1098,7 +1098,7 @@ static int sis_chip_init(struct sis7019 *sis)
		return -EIO;

		outl(SIS_AC97_CMD_CODEC_COLD_RESET, io + SIS_AC97_CMD);
		udelay(10);
		udelay(250);

		count = 0xffff;
		while ((inw(io + SIS_AC97_STATUS) & SIS_AC97_STATUS_BUSY) && --count)