Commit 08524a9f authored Apr 08, 2014 by Satheeshakrishna M Committed by Daniel Vetter Sep 24, 2014

drm/i915/skl: Restore pipe B/C interrupts



Extending BDW implementation to gen9. Pipe B/C interrupt
restoration after exiting LPSP.

v2: Fix minor rebasing conflict.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent 7879a7eb

drivers/gpu/drm/i915/intel_pm.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -6277,7 +6277,7 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
		outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
		vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);

		if (IS_BROADWELL(dev))
		if (IS_BROADWELL(dev) \|\| (INTEL_INFO(dev)->gen >= 9))
		gen8_irq_power_well_post_enable(dev_priv);
		}

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