Commit 083b4db8 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-5.6-memory' of... 

Merge tag 'tegra-for-5.6-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.6-rc1

This adds a couple of fixes for the Tegra30 EMC frequency scaling code
and adds support for EMC frequency scaling on Tegra186 and later.

* tag 'tegra-for-5.6-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  memory: tegra: Correct reset value of xusb_hostr
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  memory: tegra: Add system sleep support
  memory: tegra: Extract memory client SID programming
  memory: tegra: Add per-SoC data for Tegra186
  memory: tegra: Rename tegra_mc to tegra186_mc on Tegra186
  memory: tegra: Implement EMC debugfs interface on Tegra30
  memory: tegra: Implement EMC debugfs interface on Tegra20
  memory: tegra: Refashion EMC debugfs interface on Tegra124

Link: https://lore.kernel.org/r/20200111003553.2411874-3-thierry.reding@gmail.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 0d241c3f 5e5eca66

drivers/memory/tegra/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -13,4 +13,5 @@ obj-$(CONFIG_TEGRA_MC) += tegra-mc.o 
obj-$(CONFIG_TEGRA20_EMC)  += tegra20-emc.o

obj-$(CONFIG_TEGRA30_EMC)  += tegra30-emc.o

obj-$(CONFIG_TEGRA124_EMC) += tegra124-emc.o

obj-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o
 
obj-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o tegra186-emc.o

obj-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra186-emc.o

drivers/memory/tegra/tegra124-emc.c

+143 −42
Original line number Diff line number Diff line
@@ -467,12 +467,20 @@ struct tegra_emc { 


	void __iomem *regs;



	struct clk *clk;



	enum emc_dram_type dram_type;

	unsigned int dram_num;



	struct emc_timing last_timing;

	struct emc_timing *timings;

	unsigned int num_timings;



	struct {

		struct dentry *root;

		unsigned long min_rate;

		unsigned long max_rate;

	} debugfs;

};



/* Timing change sequence functions */
@@ -998,38 +1006,51 @@ tegra_emc_find_node_by_ram_code(struct device_node *node, u32 ram_code) 
	return NULL;

}



/* Debugfs entry */

/*

 * debugfs interface

 *

 * The memory controller driver exposes some files in debugfs that can be used

 * to control the EMC frequency. The top-level directory can be found here:

 *

 *   /sys/kernel/debug/emc

 *

 * It contains the following files:

 *

 *   - available_rates: This file contains a list of valid, space-separated

 *     EMC frequencies.

 *

 *   - min_rate: Writing a value to this file sets the given frequency as the

 *       floor of the permitted range. If this is higher than the currently

 *       configured EMC frequency, this will cause the frequency to be

 *       increased so that it stays within the valid range.

 *

 *   - max_rate: Similarily to the min_rate file, writing a value to this file

 *       sets the given frequency as the ceiling of the permitted range. If

 *       the value is lower than the currently configured EMC frequency, this

 *       will cause the frequency to be decreased so that it stays within the

 *       valid range.

 */



static int emc_debug_rate_get(void *data, u64 *rate)

static bool tegra_emc_validate_rate(struct tegra_emc *emc, unsigned long rate)

{

	struct clk *c = data;



	*rate = clk_get_rate(c);



	return 0;

}

	unsigned int i;



static int emc_debug_rate_set(void *data, u64 rate)

{

	struct clk *c = data;

	for (i = 0; i < emc->num_timings; i++)

		if (rate == emc->timings[i].rate)

			return true;



	return clk_set_rate(c, rate);

	return false;

}



DEFINE_SIMPLE_ATTRIBUTE(emc_debug_rate_fops, emc_debug_rate_get,

			emc_debug_rate_set, "%lld\n");



static int emc_debug_supported_rates_show(struct seq_file *s, void *data)

static int tegra_emc_debug_available_rates_show(struct seq_file *s,

						void *data)

{

	struct tegra_emc *emc = s->private;

	const char *prefix = "";

	unsigned int i;



	for (i = 0; i < emc->num_timings; i++) {

		struct emc_timing *timing = &emc->timings[i];



		seq_printf(s, "%s%lu", prefix, timing->rate);



		seq_printf(s, "%s%lu", prefix, emc->timings[i].rate);

		prefix = " ";

	}
@@ -1038,46 +1059,126 @@ static int emc_debug_supported_rates_show(struct seq_file *s, void *data) 
	return 0;

}



static int emc_debug_supported_rates_open(struct inode *inode,

static int tegra_emc_debug_available_rates_open(struct inode *inode,

						struct file *file)

{

	return single_open(file, emc_debug_supported_rates_show,

	return single_open(file, tegra_emc_debug_available_rates_show,

			   inode->i_private);

}



static const struct file_operations emc_debug_supported_rates_fops = {

	.open = emc_debug_supported_rates_open,

static const struct file_operations tegra_emc_debug_available_rates_fops = {

	.open = tegra_emc_debug_available_rates_open,

	.read = seq_read,

	.llseek = seq_lseek,

	.release = single_release,

};



static int tegra_emc_debug_min_rate_get(void *data, u64 *rate)

{

	struct tegra_emc *emc = data;



	*rate = emc->debugfs.min_rate;



	return 0;

}



static int tegra_emc_debug_min_rate_set(void *data, u64 rate)

{

	struct tegra_emc *emc = data;

	int err;



	if (!tegra_emc_validate_rate(emc, rate))

		return -EINVAL;



	err = clk_set_min_rate(emc->clk, rate);

	if (err < 0)

		return err;



	emc->debugfs.min_rate = rate;



	return 0;

}



DEFINE_SIMPLE_ATTRIBUTE(tegra_emc_debug_min_rate_fops,

			tegra_emc_debug_min_rate_get,

			tegra_emc_debug_min_rate_set, "%llu\n");



static int tegra_emc_debug_max_rate_get(void *data, u64 *rate)

{

	struct tegra_emc *emc = data;



	*rate = emc->debugfs.max_rate;



	return 0;

}



static int tegra_emc_debug_max_rate_set(void *data, u64 rate)

{

	struct tegra_emc *emc = data;

	int err;



	if (!tegra_emc_validate_rate(emc, rate))

		return -EINVAL;



	err = clk_set_max_rate(emc->clk, rate);

	if (err < 0)

		return err;



	emc->debugfs.max_rate = rate;



	return 0;

}



DEFINE_SIMPLE_ATTRIBUTE(tegra_emc_debug_max_rate_fops,

			tegra_emc_debug_max_rate_get,

			tegra_emc_debug_max_rate_set, "%llu\n");



static void emc_debugfs_init(struct device *dev, struct tegra_emc *emc)

{

	struct dentry *root, *file;

	struct clk *clk;

	unsigned int i;

	int err;



	root = debugfs_create_dir("emc", NULL);

	if (!root) {

		dev_err(dev, "failed to create debugfs directory\n");

	emc->clk = devm_clk_get(dev, "emc");

	if (IS_ERR(emc->clk)) {

		if (PTR_ERR(emc->clk) != -ENODEV) {

			dev_err(dev, "failed to get EMC clock: %ld\n",

				PTR_ERR(emc->clk));

			return;

		}

	}



	clk = clk_get_sys("tegra-clk-debug", "emc");

	if (IS_ERR(clk)) {

		dev_err(dev, "failed to get debug clock: %ld\n", PTR_ERR(clk));

	emc->debugfs.min_rate = ULONG_MAX;

	emc->debugfs.max_rate = 0;



	for (i = 0; i < emc->num_timings; i++) {

		if (emc->timings[i].rate < emc->debugfs.min_rate)

			emc->debugfs.min_rate = emc->timings[i].rate;



		if (emc->timings[i].rate > emc->debugfs.max_rate)

			emc->debugfs.max_rate = emc->timings[i].rate;

	}



	err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

				 emc->debugfs.max_rate);

	if (err < 0) {

		dev_err(dev, "failed to set rate range [%lu-%lu] for %pC\n",

			emc->debugfs.min_rate, emc->debugfs.max_rate,

			emc->clk);

		return;

	}



	file = debugfs_create_file("rate", S_IRUGO | S_IWUSR, root, clk,

				   &emc_debug_rate_fops);

	if (!file)

		dev_err(dev, "failed to create debugfs entry\n");

	emc->debugfs.root = debugfs_create_dir("emc", NULL);

	if (!emc->debugfs.root) {

		dev_err(dev, "failed to create debugfs directory\n");

		return;

	}



	file = debugfs_create_file("supported_rates", S_IRUGO, root, emc,

				   &emc_debug_supported_rates_fops);

	if (!file)

		dev_err(dev, "failed to create debugfs entry\n");

	debugfs_create_file("available_rates", S_IRUGO, emc->debugfs.root, emc,

			    &tegra_emc_debug_available_rates_fops);

	debugfs_create_file("min_rate", S_IRUGO | S_IWUSR, emc->debugfs.root,

			    emc, &tegra_emc_debug_min_rate_fops);

	debugfs_create_file("max_rate", S_IRUGO | S_IWUSR, emc->debugfs.root,

			    emc, &tegra_emc_debug_max_rate_fops);

}



static int tegra_emc_probe(struct platform_device *pdev)

drivers/memory/tegra/tegra186-emc.c

0 → 100644
+293 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (C) 2019 NVIDIA CORPORATION.  All rights reserved.

 */



#include <linux/clk.h>

#include <linux/debugfs.h>

#include <linux/module.h>

#include <linux/mod_devicetable.h>

#include <linux/platform_device.h>



#include <soc/tegra/bpmp.h>



struct tegra186_emc_dvfs {

	unsigned long latency;

	unsigned long rate;

};



struct tegra186_emc {

	struct tegra_bpmp *bpmp;

	struct device *dev;

	struct clk *clk;



	struct tegra186_emc_dvfs *dvfs;

	unsigned int num_dvfs;



	struct {

		struct dentry *root;

		unsigned long min_rate;

		unsigned long max_rate;

	} debugfs;

};



/*

 * debugfs interface

 *

 * The memory controller driver exposes some files in debugfs that can be used

 * to control the EMC frequency. The top-level directory can be found here:

 *

 *   /sys/kernel/debug/emc

 *

 * It contains the following files:

 *

 *   - available_rates: This file contains a list of valid, space-separated

 *     EMC frequencies.

 *

 *   - min_rate: Writing a value to this file sets the given frequency as the

 *       floor of the permitted range. If this is higher than the currently

 *       configured EMC frequency, this will cause the frequency to be

 *       increased so that it stays within the valid range.

 *

 *   - max_rate: Similarily to the min_rate file, writing a value to this file

 *       sets the given frequency as the ceiling of the permitted range. If

 *       the value is lower than the currently configured EMC frequency, this

 *       will cause the frequency to be decreased so that it stays within the

 *       valid range.

 */



static bool tegra186_emc_validate_rate(struct tegra186_emc *emc,

				       unsigned long rate)

{

	unsigned int i;



	for (i = 0; i < emc->num_dvfs; i++)

		if (rate == emc->dvfs[i].rate)

			return true;



	return false;

}



static int tegra186_emc_debug_available_rates_show(struct seq_file *s,

						   void *data)

{

	struct tegra186_emc *emc = s->private;

	const char *prefix = "";

	unsigned int i;



	for (i = 0; i < emc->num_dvfs; i++) {

		seq_printf(s, "%s%lu", prefix, emc->dvfs[i].rate);

		prefix = " ";

	}



	seq_puts(s, "\n");



	return 0;

}



static int tegra186_emc_debug_available_rates_open(struct inode *inode,

						   struct file *file)

{

	return single_open(file, tegra186_emc_debug_available_rates_show,

			   inode->i_private);

}



static const struct file_operations tegra186_emc_debug_available_rates_fops = {

	.open = tegra186_emc_debug_available_rates_open,

	.read = seq_read,

	.llseek = seq_lseek,

	.release = single_release,

};



static int tegra186_emc_debug_min_rate_get(void *data, u64 *rate)

{

	struct tegra186_emc *emc = data;



	*rate = emc->debugfs.min_rate;



	return 0;

}



static int tegra186_emc_debug_min_rate_set(void *data, u64 rate)

{

	struct tegra186_emc *emc = data;

	int err;



	if (!tegra186_emc_validate_rate(emc, rate))

		return -EINVAL;



	err = clk_set_min_rate(emc->clk, rate);

	if (err < 0)

		return err;



	emc->debugfs.min_rate = rate;



	return 0;

}



DEFINE_SIMPLE_ATTRIBUTE(tegra186_emc_debug_min_rate_fops,

			tegra186_emc_debug_min_rate_get,

			tegra186_emc_debug_min_rate_set, "%llu\n");



static int tegra186_emc_debug_max_rate_get(void *data, u64 *rate)

{

	struct tegra186_emc *emc = data;



	*rate = emc->debugfs.max_rate;



	return 0;

}



static int tegra186_emc_debug_max_rate_set(void *data, u64 rate)

{

	struct tegra186_emc *emc = data;

	int err;



	if (!tegra186_emc_validate_rate(emc, rate))

		return -EINVAL;



	err = clk_set_max_rate(emc->clk, rate);

	if (err < 0)

		return err;



	emc->debugfs.max_rate = rate;



	return 0;

}



DEFINE_SIMPLE_ATTRIBUTE(tegra186_emc_debug_max_rate_fops,

			tegra186_emc_debug_max_rate_get,

			tegra186_emc_debug_max_rate_set, "%llu\n");



static int tegra186_emc_probe(struct platform_device *pdev)

{

	struct mrq_emc_dvfs_latency_response response;

	struct tegra_bpmp_message msg;

	struct tegra186_emc *emc;

	unsigned int i;

	int err;



	emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL);

	if (!emc)

		return -ENOMEM;



	emc->bpmp = tegra_bpmp_get(&pdev->dev);

	if (IS_ERR(emc->bpmp)) {

		err = PTR_ERR(emc->bpmp);



		if (err != -EPROBE_DEFER)

			dev_err(&pdev->dev, "failed to get BPMP: %d\n", err);



		return err;

	}



	emc->clk = devm_clk_get(&pdev->dev, "emc");

	if (IS_ERR(emc->clk)) {

		err = PTR_ERR(emc->clk);

		dev_err(&pdev->dev, "failed to get EMC clock: %d\n", err);

		return err;

	}



	platform_set_drvdata(pdev, emc);

	emc->dev = &pdev->dev;



	memset(&msg, 0, sizeof(msg));

	msg.mrq = MRQ_EMC_DVFS_LATENCY;

	msg.tx.data = NULL;

	msg.tx.size = 0;

	msg.rx.data = &response;

	msg.rx.size = sizeof(response);



	err = tegra_bpmp_transfer(emc->bpmp, &msg);

	if (err < 0) {

		dev_err(&pdev->dev, "failed to EMC DVFS pairs: %d\n", err);

		return err;

	}



	emc->debugfs.min_rate = ULONG_MAX;

	emc->debugfs.max_rate = 0;



	emc->num_dvfs = response.num_pairs;



	emc->dvfs = devm_kmalloc_array(&pdev->dev, emc->num_dvfs,

				       sizeof(*emc->dvfs), GFP_KERNEL);

	if (!emc->dvfs)

		return -ENOMEM;



	dev_dbg(&pdev->dev, "%u DVFS pairs:\n", emc->num_dvfs);



	for (i = 0; i < emc->num_dvfs; i++) {

		emc->dvfs[i].rate = response.pairs[i].freq * 1000;

		emc->dvfs[i].latency = response.pairs[i].latency;



		if (emc->dvfs[i].rate < emc->debugfs.min_rate)

			emc->debugfs.min_rate = emc->dvfs[i].rate;



		if (emc->dvfs[i].rate > emc->debugfs.max_rate)

			emc->debugfs.max_rate = emc->dvfs[i].rate;



		dev_dbg(&pdev->dev, "  %2u: %lu Hz -> %lu us\n", i,

			emc->dvfs[i].rate, emc->dvfs[i].latency);

	}



	err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

				 emc->debugfs.max_rate);

	if (err < 0) {

		dev_err(&pdev->dev,

			"failed to set rate range [%lu-%lu] for %pC\n",

			emc->debugfs.min_rate, emc->debugfs.max_rate,

			emc->clk);

		return err;

	}



	emc->debugfs.root = debugfs_create_dir("emc", NULL);

	if (!emc->debugfs.root) {

		dev_err(&pdev->dev, "failed to create debugfs directory\n");

		return 0;

	}



	debugfs_create_file("available_rates", S_IRUGO, emc->debugfs.root,

			    emc, &tegra186_emc_debug_available_rates_fops);

	debugfs_create_file("min_rate", S_IRUGO | S_IWUSR, emc->debugfs.root,

			    emc, &tegra186_emc_debug_min_rate_fops);

	debugfs_create_file("max_rate", S_IRUGO | S_IWUSR, emc->debugfs.root,

			    emc, &tegra186_emc_debug_max_rate_fops);



	return 0;

}



static int tegra186_emc_remove(struct platform_device *pdev)

{

	struct tegra186_emc *emc = platform_get_drvdata(pdev);



	debugfs_remove_recursive(emc->debugfs.root);

	tegra_bpmp_put(emc->bpmp);



	return 0;

}



static const struct of_device_id tegra186_emc_of_match[] = {

#if defined(CONFIG_ARCH_TEGRA186_SOC)

	{ .compatible = "nvidia,tegra186-emc" },

#endif

#if defined(CONFIG_ARCH_TEGRA194_SOC)

	{ .compatible = "nvidia,tegra194-emc" },

#endif

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, tegra186_emc_of_match);



static struct platform_driver tegra186_emc_driver = {

	.driver = {

		.name = "tegra186-emc",

		.of_match_table = tegra186_emc_of_match,

		.suppress_bind_attrs = true,

	},

	.probe = tegra186_emc_probe,

	.remove = tegra186_emc_remove,

};

module_platform_driver(tegra186_emc_driver);



MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");

MODULE_DESCRIPTION("NVIDIA Tegra186 External Memory Controller driver");

MODULE_LICENSE("GPL v2");

drivers/memory/tegra/tegra186.c

+1062 −55

File changed.

Preview size limit exceeded, changes collapsed.

drivers/memory/tegra/tegra20-emc.c

+175 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <linux/clk.h>

#include <linux/clk/tegra.h>

#include <linux/completion.h>

#include <linux/debugfs.h>

#include <linux/err.h>

#include <linux/interrupt.h>

#include <linux/io.h>
@@ -150,6 +151,12 @@ struct tegra_emc { 


	struct emc_timing *timings;

	unsigned int num_timings;



	struct {

		struct dentry *root;

		unsigned long min_rate;

		unsigned long max_rate;

	} debugfs;

};



static irqreturn_t tegra_emc_isr(int irq, void *data)
@@ -478,6 +485,171 @@ static long emc_round_rate(unsigned long rate, 
	return timing->rate;

}



/*

 * debugfs interface

 *

 * The memory controller driver exposes some files in debugfs that can be used

 * to control the EMC frequency. The top-level directory can be found here:

 *

 *   /sys/kernel/debug/emc

 *

 * It contains the following files:

 *

 *   - available_rates: This file contains a list of valid, space-separated

 *     EMC frequencies.

 *

 *   - min_rate: Writing a value to this file sets the given frequency as the

 *       floor of the permitted range. If this is higher than the currently

 *       configured EMC frequency, this will cause the frequency to be

 *       increased so that it stays within the valid range.

 *

 *   - max_rate: Similarily to the min_rate file, writing a value to this file

 *       sets the given frequency as the ceiling of the permitted range. If

 *       the value is lower than the currently configured EMC frequency, this

 *       will cause the frequency to be decreased so that it stays within the

 *       valid range.

 */



static bool tegra_emc_validate_rate(struct tegra_emc *emc, unsigned long rate)

{

	unsigned int i;



	for (i = 0; i < emc->num_timings; i++)

		if (rate == emc->timings[i].rate)

			return true;



	return false;

}



static int tegra_emc_debug_available_rates_show(struct seq_file *s, void *data)

{

	struct tegra_emc *emc = s->private;

	const char *prefix = "";

	unsigned int i;



	for (i = 0; i < emc->num_timings; i++) {

		seq_printf(s, "%s%lu", prefix, emc->timings[i].rate);

		prefix = " ";

	}



	seq_puts(s, "\n");



	return 0;

}



static int tegra_emc_debug_available_rates_open(struct inode *inode,

						struct file *file)

{

	return single_open(file, tegra_emc_debug_available_rates_show,

			   inode->i_private);

}



static const struct file_operations tegra_emc_debug_available_rates_fops = {

	.open = tegra_emc_debug_available_rates_open,

	.read = seq_read,

	.llseek = seq_lseek,

	.release = single_release,

};



static int tegra_emc_debug_min_rate_get(void *data, u64 *rate)

{

	struct tegra_emc *emc = data;



	*rate = emc->debugfs.min_rate;



	return 0;

}



static int tegra_emc_debug_min_rate_set(void *data, u64 rate)

{

	struct tegra_emc *emc = data;

	int err;



	if (!tegra_emc_validate_rate(emc, rate))

		return -EINVAL;



	err = clk_set_min_rate(emc->clk, rate);

	if (err < 0)

		return err;



	emc->debugfs.min_rate = rate;



	return 0;

}



DEFINE_SIMPLE_ATTRIBUTE(tegra_emc_debug_min_rate_fops,

			tegra_emc_debug_min_rate_get,

			tegra_emc_debug_min_rate_set, "%llu\n");



static int tegra_emc_debug_max_rate_get(void *data, u64 *rate)

{

	struct tegra_emc *emc = data;



	*rate = emc->debugfs.max_rate;



	return 0;

}



static int tegra_emc_debug_max_rate_set(void *data, u64 rate)

{

	struct tegra_emc *emc = data;

	int err;



	if (!tegra_emc_validate_rate(emc, rate))

		return -EINVAL;



	err = clk_set_max_rate(emc->clk, rate);

	if (err < 0)

		return err;



	emc->debugfs.max_rate = rate;



	return 0;

}



DEFINE_SIMPLE_ATTRIBUTE(tegra_emc_debug_max_rate_fops,

			tegra_emc_debug_max_rate_get,

			tegra_emc_debug_max_rate_set, "%llu\n");



static void tegra_emc_debugfs_init(struct tegra_emc *emc)

{

	struct device *dev = emc->dev;

	unsigned int i;

	int err;



	emc->debugfs.min_rate = ULONG_MAX;

	emc->debugfs.max_rate = 0;



	for (i = 0; i < emc->num_timings; i++) {

		if (emc->timings[i].rate < emc->debugfs.min_rate)

			emc->debugfs.min_rate = emc->timings[i].rate;



		if (emc->timings[i].rate > emc->debugfs.max_rate)

			emc->debugfs.max_rate = emc->timings[i].rate;

	}



	err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

				 emc->debugfs.max_rate);

	if (err < 0) {

		dev_err(dev, "failed to set rate range [%lu-%lu] for %pC\n",

			emc->debugfs.min_rate, emc->debugfs.max_rate,

			emc->clk);

	}



	emc->debugfs.root = debugfs_create_dir("emc", NULL);

	if (!emc->debugfs.root) {

		dev_err(emc->dev, "failed to create debugfs directory\n");

		return;

	}



	debugfs_create_file("available_rates", S_IRUGO, emc->debugfs.root,

			    emc, &tegra_emc_debug_available_rates_fops);

	debugfs_create_file("min_rate", S_IRUGO | S_IWUSR, emc->debugfs.root,

			    emc, &tegra_emc_debug_min_rate_fops);

	debugfs_create_file("max_rate", S_IRUGO | S_IWUSR, emc->debugfs.root,

			    emc, &tegra_emc_debug_max_rate_fops);

}



static int tegra_emc_probe(struct platform_device *pdev)

{

	struct device_node *np;
@@ -550,6 +722,9 @@ static int tegra_emc_probe(struct platform_device *pdev) 
		goto unset_cb;

	}



	platform_set_drvdata(pdev, emc);

	tegra_emc_debugfs_init(emc);



	return 0;



unset_cb:

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