Commit 08342537 authored by Can Guo's avatar Can Guo Committed by Martin K. Petersen
Browse files

scsi: ufs: Do not clear the DL layer timers 

During power mode change, PACP_PWR_Req frame sends PAPowerModeUserData
parameters (and they are considered valid by device if Flags[4] -
UserDataValid bit is set in the same frame).  Currently we don't set these
PAPowerModeUserData parameters and hardware always sets UserDataValid bit
which would clear all the DL layer timeout values of the peer device after
the power mode change.

This change sets the PAPowerModeUserData[0..5] to UniPro specification
recommended default values, in addition we are also setting the relevant
DME_LOCAL_* timer attributes as required by UFS HCI specification.

Link: https://lore.kernel.org/r/0101016ed3d688a4-cfaeb1c9-238b-46c4-9c89-d48c410ba325-000000@us-west-2.amazonses.com


Reviewed-by: default avatarAvri Altman <avri.altman@wdc.com>
Reviewed-by: default avatarBean Huo <beanhuo@micron.com>
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 17c7d35f

drivers/scsi/ufs/ufshcd.c

+20 −0
Original line number Diff line number Diff line
@@ -4033,6 +4033,26 @@ static int ufshcd_change_power_mode(struct ufs_hba *hba, 
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),

						pwr_mode->hs_rate);



	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),

			DL_FC0ProtectionTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),

			DL_TC0ReplayTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),

			DL_AFC0ReqTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),

			DL_FC1ProtectionTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),

			DL_TC1ReplayTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),

			DL_AFC1ReqTimeOutVal_Default);



	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),

			DL_FC0ProtectionTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),

			DL_TC0ReplayTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),

			DL_AFC0ReqTimeOutVal_Default);



	ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4

			| pwr_mode->pwr_tx);

drivers/scsi/ufs/unipro.h

+11 −0
Original line number Diff line number Diff line
@@ -161,6 +161,17 @@ 
/* PHY Adapter Protocol Constants */

#define PA_MAXDATALANES	4



#define DL_FC0ProtectionTimeOutVal_Default	8191

#define DL_TC0ReplayTimeOutVal_Default		65535

#define DL_AFC0ReqTimeOutVal_Default		32767

#define DL_FC1ProtectionTimeOutVal_Default	8191

#define DL_TC1ReplayTimeOutVal_Default		65535

#define DL_AFC1ReqTimeOutVal_Default		32767



#define DME_LocalFC0ProtectionTimeOutVal	0xD041

#define DME_LocalTC0ReplayTimeOutVal		0xD042

#define DME_LocalAFC0ReqTimeOutVal		0xD043



/* PA power modes */

enum {

	FAST_MODE	= 1,

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