Merge tag 'asoc-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next

Null block device driver

================================================================================

I. Overview

The null block device (/dev/nullb*) is used for benchmarking the various

block-layer implementations. It emulates a block device of X gigabytes in size.

The following instances are possible:

  Single-queue block-layer

    - Request-based.

    - Single submission queue per device.

    - Implements IO scheduling algorithms (CFQ, Deadline, noop).

  Multi-queue block-layer

    - Request-based.

    - Configurable submission queues per device.

  No block-layer (Known as bio-based)

    - Bio-based. IO requests are submitted directly to the device driver.

    - Directly accepts bio data structure and returns them.

All of them have a completion queue for each core in the system.

II. Module parameters applicable for all instances:

queue_mode=[0-2]: Default: 2-Multi-queue

  Selects which block-layer the module should instantiate with.

  0: Bio-based.

  1: Single-queue.

  2: Multi-queue.

home_node=[0--nr_nodes]: Default: NUMA_NO_NODE

  Selects what CPU node the data structures are allocated from.

gb=[Size in GB]: Default: 250GB

  The size of the device reported to the system.

bs=[Block size (in bytes)]: Default: 512 bytes

  The block size reported to the system.

nr_devices=[Number of devices]: Default: 2

  Number of block devices instantiated. They are instantiated as /dev/nullb0,

  etc.

irq_mode=[0-2]: Default: 1-Soft-irq

  The completion mode used for completing IOs to the block-layer.

  0: None.

  1: Soft-irq. Uses IPI to complete IOs across CPU nodes. Simulates the overhead

     when IOs are issued from another CPU node than the home the device is

     connected to.

  2: Timer: Waits a specific period (completion_nsec) for each IO before

     completion.

completion_nsec=[ns]: Default: 10.000ns

  Combined with irq_mode=2 (timer). The time each completion event must wait.

submit_queues=[0..nr_cpus]:

  The number of submission queues attached to the device driver. If unset, it

  defaults to 1 on single-queue and bio-based instances. For multi-queue,

  it is ignored when use_per_node_hctx module parameter is 1.

hw_queue_depth=[0..qdepth]: Default: 64

  The hardware queue depth of the device.

III: Multi-queue specific parameters

use_per_node_hctx=[0/1]: Default: 0

  0: The number of submit queues are set to the value of the submit_queues

     parameter.

  1: The multi-queue block layer is instantiated with a hardware dispatch

     queue for each CPU node in the system.

ADI AXI-I2S controller

Required properties:

 - compatible : Must be "adi,axi-i2s-1.00.a"

 - reg : Must contain I2S core's registers location and length

 - clocks : Pairs of phandle and specifier referencing the controller's clocks.

   The controller expects two clocks, the clock used for the AXI interface and

   the clock used as the sampling rate reference clock sample.

 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample

   rate reference clock.

 - dmas: Pairs of phandle and specifier for the DMA channels that are used by

   the core. The core expects two dma channels, one for transmit and one for

   receive.

 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.

For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties

please check:

	* resource-names.txt

	* clock/clock-bindings.txt

	* dma/dma.txt

Example:

	i2s: i2s@0x77600000 {

		compatible = "adi,axi-i2s-1.00.a";

		reg = <0x77600000 0x1000>;

		clocks = <&clk 15>, <&audio_clock>;

		clock-names = "axi", "ref";

		dmas = <&ps7_dma 0>, <&ps7_dma 1>;

		dma-names = "tx", "rx";

	};

ADI AXI-SPDIF controller

Required properties:

 - compatible : Must be "adi,axi-spdif-1.00.a"

 - reg : Must contain SPDIF core's registers location and length

 - clocks : Pairs of phandle and specifier referencing the controller's clocks.

   The controller expects two clocks, the clock used for the AXI interface and

   the clock used as the sampling rate reference clock sample.

 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample

   rate reference clock.

 - dmas: Pairs of phandle and specifier for the DMA channel that is used by

   the core. The core expects one dma channel for transmit.

 - dma-names : Must be "tx"

For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties

please check:

	* resource-names.txt

	* clock/clock-bindings.txt

	* dma/dma.txt

Example:

	spdif: spdif@0x77400000 {

		compatible = "adi,axi-spdif-tx-1.00.a";

		reg = <0x77600000 0x1000>;

		clocks = <&clk 15>, <&audio_clock>;

		clock-names = "axi", "ref";

		dmas = <&ps7_dma 0>;

		dma-names = "tx";

	};

* Broadcom BCM2835 SoC I2S/PCM module

Required properties:

- compatible: "brcm,bcm2835-i2s"

- reg: A list of base address and size entries:

	* The first entry should cover the PCM registers

	* The second entry should cover the PCM clock registers

- dmas: List of DMA controller phandle and DMA request line ordered pairs.

- dma-names: Identifier string for each DMA request line in the dmas property.

  These strings correspond 1:1 with the ordered pairs in dmas.

  One of the DMA channels will be responsible for transmission (should be

  named "tx") and one for reception (should be named "rx").

Example:

bcm2835_i2s: i2s@7e203000 {

	compatible = "brcm,bcm2835-i2s";

	reg = <0x7e203000 0x20>,

	      <0x7e101098 0x02>;

	dmas = <&dma 2>,

	       <&dma 3>;

	dma-names = "tx", "rx";

};

CS42L52 audio CODEC

Required properties:

  - compatible : "cirrus,cs42l52"

  - reg : the I2C address of the device for I2C

Optional properties:

  - cirrus,reset-gpio : GPIO controller's phandle and the number

  of the GPIO used to reset the codec.

  - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.

  Allowable values of 0x00 through 0x0F. These are raw values written to the

  register, not the actual frequency. The frequency is determined by the following.

  Frequency = (64xFs)/(N+2)

  N = chgfreq_val

  Fs = Sample Rate (variable)

  - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured

  as a differential input. If not present then the MICA input is configured as

  Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.

  - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured

  as a differential input. If not present then the MICB input is configured as

  Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.

  - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin

  0 = 0.5 x VA

  1 = 0.6 x VA

  2 = 0.7 x VA

  3 = 0.8 x VA

  4 = 0.83 x VA

  5 = 0.91 x VA

Example:

codec: codec@4a {

	compatible = "cirrus,cs42l52";

	reg = <0x4a>;

	reset-gpio = <&gpio 10 0>;

	cirrus,chgfreq-divisor = <0x05>;

	cirrus.mica-differential-cfg;

	cirrus,micbias-lvl = <5>;

};