Commit 07db8696 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6 

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6:
  [PATCH] forcedeth: fix initialization
  [PATCH] sky2: version 1.2
  [PATCH] sky2: reset function can be devinit
  [PATCH] sky2: use ALIGN() macro
  [PATCH] sky2: add fake idle irq timer
  [PATCH] sky2: reschedule if irq still pending
  [PATCH] bcm43xx: make PIO mode usable
  [PATCH] bcm43xx: add to MAINTAINERS
  [PATCH] softmac: fix SIOCSIWAP
  [PATCH] Fix crash on big-endian systems during scan
  e1000: Update truesize with the length of the packet for packet split
  [PATCH] Fix locking in gianfar
parents bd5838b9 86a0f043

MAINTAINERS

+8 −0
Original line number Diff line number Diff line
@@ -421,6 +421,14 @@ L: linux-hams@vger.kernel.org 
W:	http://www.baycom.org/~tom/ham/ham.html

S:	Maintained



BCM43XX WIRELESS DRIVER

P:	Michael Buesch

M:	mb@bu3sch.de

P:	Stefano Brivio

M:	st3@riseup.net

W:	http://bcm43xx.berlios.de/

S:	Maintained



BEFS FILE SYSTEM

P:	Sergey S. Kostyliov

M:	rathamahata@php4.ru

drivers/net/e1000/e1000_main.c

+1 −0
Original line number Diff line number Diff line
@@ -3768,6 +3768,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 
			ps_page->ps_page[j] = NULL;

			skb->len += length;

			skb->data_len += length;

			skb->truesize += length;

		}



copydone:

drivers/net/forcedeth.c

+67 −12
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ 
 *	0.50: 20 Jan 2006: Add 8021pq tagging support.

 *	0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.

 *	0.52: 20 Jan 2006: Add MSI/MSIX support.

 *	0.53: 19 Mar 2006: Fix init from low power mode and add hw reset.

 *

 * Known bugs:

 * We suspect that on some hardware no TX done interrupts are generated.
@@ -116,7 +117,7 @@ 
 * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few

 * superfluous timer interrupts from the nic.

 */

#define FORCEDETH_VERSION		"0.52"

#define FORCEDETH_VERSION		"0.53"

#define DRV_NAME			"forcedeth"



#include <linux/module.h>
@@ -160,6 +161,7 @@ 
#define DEV_HAS_VLAN            0x0020  /* device supports vlan tagging and striping */

#define DEV_HAS_MSI             0x0040  /* device supports MSI */

#define DEV_HAS_MSI_X           0x0080  /* device supports MSI-X */

#define DEV_HAS_POWER_CNTRL     0x0100  /* device supports power savings */



enum {

	NvRegIrqStatus = 0x000,
@@ -203,6 +205,8 @@ enum { 
#define NVREG_MISC1_HD		0x02

#define NVREG_MISC1_FORCE	0x3b0f3c



	NvRegMacReset = 0x3c,

#define NVREG_MAC_RESET_ASSERT	0x0F3

	NvRegTransmitterControl = 0x084,

#define NVREG_XMITCTL_START	0x01

	NvRegTransmitterStatus = 0x088,
@@ -326,6 +330,10 @@ enum { 
	NvRegMSIXMap0 = 0x3e0,

	NvRegMSIXMap1 = 0x3e4,

	NvRegMSIXIrqStatus = 0x3f0,



	NvRegPowerState2 = 0x600,

#define NVREG_POWERSTATE2_POWERUP_MASK		0x0F11

#define NVREG_POWERSTATE2_POWERUP_REV_A3	0x0001

};



/* Big endian: should work, but is untested */
@@ -414,7 +422,8 @@ typedef union _ring_type { 
#define NV_RX3_VLAN_TAG_MASK	(0x0000FFFF)



/* Miscelaneous hardware related defines: */

#define NV_PCI_REGSZ		0x270

#define NV_PCI_REGSZ_VER1      	0x270

#define NV_PCI_REGSZ_VER2      	0x604



/* various timeout delays: all in usec */

#define NV_TXRX_RESET_DELAY	4
@@ -431,6 +440,7 @@ typedef union _ring_type { 
#define NV_MIIBUSY_DELAY	50

#define NV_MIIPHY_DELAY	10

#define NV_MIIPHY_DELAYMAX	10000

#define NV_MAC_RESET_DELAY	64



#define NV_WAKEUPPATTERNS	5

#define NV_WAKEUPMASKENTRIES	4
@@ -552,6 +562,8 @@ struct fe_priv { 
	u32 desc_ver;

	u32 txrxctl_bits;

	u32 vlanctl_bits;

	u32 driver_data;

	u32 register_size;



	void __iomem *base;
@@ -919,6 +931,24 @@ static void nv_txrx_reset(struct net_device *dev) 
	pci_push(base);

}



static void nv_mac_reset(struct net_device *dev)

{

	struct fe_priv *np = netdev_priv(dev);

	u8 __iomem *base = get_hwbase(dev);



	dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);

	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);

	pci_push(base);

	writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);

	pci_push(base);

	udelay(NV_MAC_RESET_DELAY);

	writel(0, base + NvRegMacReset);

	pci_push(base);

	udelay(NV_MAC_RESET_DELAY);

	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);

	pci_push(base);

}



/*

 * nv_get_stats: dev->get_stats function

 * Get latest stats value from the nic.
@@ -1331,7 +1361,7 @@ static void nv_tx_timeout(struct net_device *dev) 
				dev->name, (unsigned long)np->ring_addr,

				np->next_tx, np->nic_tx);

		printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);

		for (i=0;i<0x400;i+= 32) {

		for (i=0;i<=np->register_size;i+= 32) {

			printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",

					i,

					readl(base + i + 0), readl(base + i + 4),
@@ -2488,11 +2518,11 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 
}



#define FORCEDETH_REGS_VER	1

#define FORCEDETH_REGS_SIZE	0x400 /* 256 32-bit registers */



static int nv_get_regs_len(struct net_device *dev)

{

	return FORCEDETH_REGS_SIZE;

	struct fe_priv *np = netdev_priv(dev);

	return np->register_size;

}



static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
@@ -2504,7 +2534,7 @@ static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void 


	regs->version = FORCEDETH_REGS_VER;

	spin_lock_irq(&np->lock);

	for (i=0;i<FORCEDETH_REGS_SIZE/sizeof(u32);i++)

	for (i = 0;i <= np->register_size/sizeof(u32); i++)

		rbuf[i] = readl(base + i*sizeof(u32));

	spin_unlock_irq(&np->lock);

}
@@ -2608,6 +2638,8 @@ static int nv_open(struct net_device *dev) 
	dprintk(KERN_DEBUG "nv_open: begin\n");



	/* 1) erase previous misconfiguration */

	if (np->driver_data & DEV_HAS_POWER_CNTRL)

		nv_mac_reset(dev);

	/* 4.1-1: stop adapter: ignored, 4.3 seems to be overkill */

	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);

	writel(0, base + NvRegMulticastAddrB);
@@ -2878,6 +2910,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i 
	unsigned long addr;

	u8 __iomem *base;

	int err, i;

	u32 powerstate;



	dev = alloc_etherdev(sizeof(struct fe_priv));

	err = -ENOMEM;
@@ -2910,6 +2943,11 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i 
	if (err < 0)

		goto out_disable;



	if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL))

		np->register_size = NV_PCI_REGSZ_VER2;

	else

		np->register_size = NV_PCI_REGSZ_VER1;



	err = -EINVAL;

	addr = 0;

	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
@@ -2918,7 +2956,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i 
				pci_resource_len(pci_dev, i),

				pci_resource_flags(pci_dev, i));

		if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&

				pci_resource_len(pci_dev, i) >= NV_PCI_REGSZ) {

				pci_resource_len(pci_dev, i) >= np->register_size) {

			addr = pci_resource_start(pci_dev, i);

			break;

		}
@@ -2929,6 +2967,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i 
		goto out_relreg;

	}



	/* copy of driver data */

	np->driver_data = id->driver_data;



	/* handle different descriptor versions */

	if (id->driver_data & DEV_HAS_HIGH_DMA) {

		/* packet format 3: supports 40-bit addressing */
@@ -2986,7 +3027,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i 
	}



	err = -ENOMEM;

	np->base = ioremap(addr, NV_PCI_REGSZ);

	np->base = ioremap(addr, np->register_size);

	if (!np->base)

		goto out_relreg;

	dev->base_addr = (unsigned long)np->base;
@@ -3062,6 +3103,20 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i 
	writel(0, base + NvRegWakeUpFlags);

	np->wolenabled = 0;



	if (id->driver_data & DEV_HAS_POWER_CNTRL) {

		u8 revision_id;

		pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id);



		/* take phy and nic out of low power mode */

		powerstate = readl(base + NvRegPowerState2);

		powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK;

		if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||

		     id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) &&

		    revision_id >= 0xA3)

			powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3;

		writel(powerstate, base + NvRegPowerState2);

	}



	if (np->desc_ver == DESC_VER_1) {

		np->tx_flags = NV_TX_VALID;

	} else {
@@ -3223,19 +3278,19 @@ static struct pci_device_id pci_tbl[] = { 
	},

	{	/* MCP51 Ethernet Controller */

		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA,

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,

	},

	{	/* MCP51 Ethernet Controller */

		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA,

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,

	},

	{	/* MCP55 Ethernet Controller */

		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X,

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL,

	},

	{	/* MCP55 Ethernet Controller */

		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X,

		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL,

	},

	{0,},

};

drivers/net/gianfar.c

+28 −28
Original line number Diff line number Diff line
@@ -210,7 +210,8 @@ static int gfar_probe(struct platform_device *pdev) 
		goto regs_fail;

	}



	spin_lock_init(&priv->lock);

	spin_lock_init(&priv->txlock);

	spin_lock_init(&priv->rxlock);



	platform_set_drvdata(pdev, dev);
@@ -515,11 +516,13 @@ void stop_gfar(struct net_device *dev) 
	phy_stop(priv->phydev);



	/* Lock it down */

	spin_lock_irqsave(&priv->lock, flags);

	spin_lock_irqsave(&priv->txlock, flags);

	spin_lock(&priv->rxlock);



	gfar_halt(dev);



	spin_unlock_irqrestore(&priv->lock, flags);

	spin_unlock(&priv->rxlock);

	spin_unlock_irqrestore(&priv->txlock, flags);



	/* Free the IRQs */

	if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
@@ -605,14 +608,15 @@ void gfar_start(struct net_device *dev) 
	tempval |= DMACTRL_INIT_SETTINGS;

	gfar_write(&priv->regs->dmactrl, tempval);



	/* Clear THLT, so that the DMA starts polling now */

	gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);



	/* Make sure we aren't stopped */

	tempval = gfar_read(&priv->regs->dmactrl);

	tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);

	gfar_write(&priv->regs->dmactrl, tempval);



	/* Clear THLT/RHLT, so that the DMA starts polling now */

	gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);

	gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);



	/* Unmask the interrupts we look for */

	gfar_write(&regs->imask, IMASK_DEFAULT);

}
@@ -928,12 +932,13 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) 
	struct txfcb *fcb = NULL;

	struct txbd8 *txbdp;

	u16 status;

	unsigned long flags;



	/* Update transmit stats */

	priv->stats.tx_bytes += skb->len;



	/* Lock priv now */

	spin_lock_irq(&priv->lock);

	spin_lock_irqsave(&priv->txlock, flags);



	/* Point at the first free tx descriptor */

	txbdp = priv->cur_tx;
@@ -1004,7 +1009,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) 
	gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);



	/* Unlock priv */

	spin_unlock_irq(&priv->lock);

	spin_unlock_irqrestore(&priv->txlock, flags);



	return 0;

}
@@ -1049,7 +1054,7 @@ static void gfar_vlan_rx_register(struct net_device *dev, 
	unsigned long flags;

	u32 tempval;



	spin_lock_irqsave(&priv->lock, flags);

	spin_lock_irqsave(&priv->rxlock, flags);



	priv->vlgrp = grp;
@@ -1076,7 +1081,7 @@ static void gfar_vlan_rx_register(struct net_device *dev, 
		gfar_write(&priv->regs->rctrl, tempval);

	}



	spin_unlock_irqrestore(&priv->lock, flags);

	spin_unlock_irqrestore(&priv->rxlock, flags);

}
@@ -1085,12 +1090,12 @@ static void gfar_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) 
	struct gfar_private *priv = netdev_priv(dev);

	unsigned long flags;



	spin_lock_irqsave(&priv->lock, flags);

	spin_lock_irqsave(&priv->rxlock, flags);



	if (priv->vlgrp)

		priv->vlgrp->vlan_devices[vid] = NULL;



	spin_unlock_irqrestore(&priv->lock, flags);

	spin_unlock_irqrestore(&priv->rxlock, flags);

}
@@ -1179,7 +1184,7 @@ static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs) 
	gfar_write(&priv->regs->ievent, IEVENT_TX_MASK);



	/* Lock priv */

	spin_lock(&priv->lock);

	spin_lock(&priv->txlock);

	bdp = priv->dirty_tx;

	while ((bdp->status & TXBD_READY) == 0) {

		/* If dirty_tx and cur_tx are the same, then either the */
@@ -1224,7 +1229,7 @@ static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs) 
	else

		gfar_write(&priv->regs->txic, 0);



	spin_unlock(&priv->lock);

	spin_unlock(&priv->txlock);



	return IRQ_HANDLED;

}
@@ -1305,9 +1310,10 @@ irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs) 
{

	struct net_device *dev = (struct net_device *) dev_id;

	struct gfar_private *priv = netdev_priv(dev);



#ifdef CONFIG_GFAR_NAPI

	u32 tempval;

#else

	unsigned long flags;

#endif



	/* Clear IEVENT, so rx interrupt isn't called again
@@ -1330,7 +1336,7 @@ irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs) 
	}

#else



	spin_lock(&priv->lock);

	spin_lock_irqsave(&priv->rxlock, flags);

	gfar_clean_rx_ring(dev, priv->rx_ring_size);



	/* If we are coalescing interrupts, update the timer */
@@ -1341,7 +1347,7 @@ irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs) 
	else

		gfar_write(&priv->regs->rxic, 0);



	spin_unlock(&priv->lock);

	spin_unlock_irqrestore(&priv->rxlock, flags);

#endif



	return IRQ_HANDLED;
@@ -1490,13 +1496,6 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit) 
	/* Update the current rxbd pointer to be the next one */

	priv->cur_rx = bdp;



	/* If no packets have arrived since the

	 * last one we processed, clear the IEVENT RX and

	 * BSY bits so that another interrupt won't be

	 * generated when we set IMASK */

	if (bdp->status & RXBD_EMPTY)

		gfar_write(&priv->regs->ievent, IEVENT_RX_MASK);



	return howmany;

}
@@ -1516,7 +1515,7 @@ static int gfar_poll(struct net_device *dev, int *budget) 
	rx_work_limit -= howmany;

	*budget -= howmany;



	if (rx_work_limit >= 0) {

	if (rx_work_limit > 0) {

		netif_rx_complete(dev);



		/* Clear the halt bit in RSTAT */
@@ -1533,7 +1532,8 @@ static int gfar_poll(struct net_device *dev, int *budget) 
			gfar_write(&priv->regs->rxic, 0);

	}



	return (rx_work_limit < 0) ? 1 : 0;

	/* Return 1 if there's more work to do */

	return (rx_work_limit > 0) ? 0 : 1;

}

#endif
@@ -1629,7 +1629,7 @@ static void adjust_link(struct net_device *dev) 
	struct phy_device *phydev = priv->phydev;

	int new_state = 0;



	spin_lock_irqsave(&priv->lock, flags);

	spin_lock_irqsave(&priv->txlock, flags);

	if (phydev->link) {

		u32 tempval = gfar_read(&regs->maccfg2);

		u32 ecntrl = gfar_read(&regs->ecntrl);
@@ -1694,7 +1694,7 @@ static void adjust_link(struct net_device *dev) 
	if (new_state && netif_msg_link(priv))

		phy_print_status(phydev);



	spin_unlock_irqrestore(&priv->lock, flags);

	spin_unlock_irqrestore(&priv->txlock, flags);

}



/* Update the hash table based on the current list of multicast

drivers/net/gianfar.h

+46 −21
Original line number Diff line number Diff line
@@ -656,43 +656,62 @@ struct gfar { 
 * the buffer descriptor determines the actual condition.

 */

struct gfar_private {

	/* pointers to arrays of skbuffs for tx and rx */

	/* Fields controlled by TX lock */

	spinlock_t txlock;



	/* Pointer to the array of skbuffs */

	struct sk_buff ** tx_skbuff;

	struct sk_buff ** rx_skbuff;



	/* indices pointing to the next free sbk in skb arrays */

	/* next free skb in the array */

	u16 skb_curtx;

	u16 skb_currx;



	/* index of the first skb which hasn't been transmitted

	 * yet. */

	/* First skb in line to be transmitted */

	u16 skb_dirtytx;



	/* Configuration info for the coalescing features */

	unsigned char txcoalescing;

	unsigned short txcount;

	unsigned short txtime;



	/* Buffer descriptor pointers */

	struct txbd8 *tx_bd_base;	/* First tx buffer descriptor */

	struct txbd8 *cur_tx;	        /* Next free ring entry */

	struct txbd8 *dirty_tx;		/* First buffer in line

					   to be transmitted */

	unsigned int tx_ring_size;



	/* RX Locked fields */

	spinlock_t rxlock;



	/* skb array and index */

	struct sk_buff ** rx_skbuff;

	u16 skb_currx;



	/* RX Coalescing values */

	unsigned char rxcoalescing;

	unsigned short rxcount;

	unsigned short rxtime;



	/* GFAR addresses */

	struct rxbd8 *rx_bd_base;	/* Base addresses of Rx and Tx Buffers */

	struct txbd8 *tx_bd_base;

	struct rxbd8 *rx_bd_base;	/* First Rx buffers */

	struct rxbd8 *cur_rx;           /* Next free rx ring entry */

	struct txbd8 *cur_tx;	        /* Next free ring entry */

	struct txbd8 *dirty_tx;		/* The Ring entry to be freed. */

	struct gfar __iomem *regs;	/* Pointer to the GFAR memory mapped Registers */

	u32 __iomem *hash_regs[16];

	int hash_width;

	struct net_device_stats stats; /* linux network statistics */

	struct gfar_extra_stats extra_stats;

	spinlock_t lock;



	/* RX parameters */

	unsigned int rx_ring_size;

	unsigned int rx_buffer_size;

	unsigned int rx_stash_size;

	unsigned int rx_stash_index;

	unsigned int tx_ring_size;

	unsigned int rx_ring_size;



	struct vlan_group *vlgrp;



	/* Unprotected fields */

	/* Pointer to the GFAR memory mapped Registers */

	struct gfar __iomem *regs;



	/* Hash registers and their width */

	u32 __iomem *hash_regs[16];

	int hash_width;



	/* global parameters */

	unsigned int fifo_threshold;

	unsigned int fifo_starve;

	unsigned int fifo_starve_off;
@@ -702,13 +721,15 @@ struct gfar_private { 
		extended_hash:1,

		bd_stash_en:1;

	unsigned short padding;

	struct vlan_group *vlgrp;

	/* Info structure initialized by board setup code */



	unsigned int interruptTransmit;

	unsigned int interruptReceive;

	unsigned int interruptError;



	/* info structure initialized by platform code */

	struct gianfar_platform_data *einfo;



	/* PHY stuff */

	struct phy_device *phydev;

	struct mii_bus *mii_bus;

	int oldspeed;
@@ -716,6 +737,10 @@ struct gfar_private { 
	int oldlink;



	uint32_t msg_enable;



	/* Network Statistics */

	struct net_device_stats stats;

	struct gfar_extra_stats extra_stats;

};



static inline u32 gfar_read(volatile unsigned __iomem *addr)

CRA Git | Maintained and supported by SUSTech CRA and CCSE