drm/amdgpu: always reserve one more shared slot for pipelined BO moves (07daa8a0) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -50,7 +50,8 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
		bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
		p->uf_entry.priority = 0;
		p->uf_entry.tv.bo = &bo->tbo;
		p->uf_entry.tv.num_shared = 1;
		/* One for TTM and one for the CS job */
		p->uf_entry.tv.num_shared = 2;
		p->uf_entry.user_pages = NULL;

		drm_gem_object_put_unlocked(gobj);
		@@ -598,8 +599,9 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
		return r;
		}

		/* One for TTM and one for the CS job */
		amdgpu_bo_list_for_each_entry(e, p->bo_list)
		e->tv.num_shared = 1;
		e->tv.num_shared = 2;

		amdgpu_bo_list_get_list(p->bo_list, &p->validated);
		if (p->bo_list->first_userptr != p->bo_list->num_entries)

+2 −2

Original line number	Diff line number	Diff line
		@@ -617,8 +617,8 @@ void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
		{
		entry->priority = 0;
		entry->tv.bo = &vm->root.base.bo->tbo;
		/* One for the VM updates and one for the CS job */
		entry->tv.num_shared = 2;
		/* One for the VM updates, one for TTM and one for the CS job */
		entry->tv.num_shared = 3;
		entry->user_pages = NULL;
		list_add(&entry->tv.head, validated);
		}