Commit 07d6a199 authored Feb 15, 2019 by Anthony Koo Committed by Alex Deucher Mar 19, 2019

drm/amd/display: Fix soft hang issue when some DPCD data invalid



[Why]
AUX transaction returns success, but data has invalid lane count and rate
which when passed to VBIOS command table causes it to soft hang

[How]
Do some sanity checking and fail if the DPCD caps are invalid.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 09e5665a

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+9 −0

Original line number	Diff line number	Diff line
		@@ -2474,6 +2474,15 @@ static bool retrieve_link_cap(struct dc_link *link)
		}
		}

		/* Error condition checking...
		* It is impossible for Sink to report Max Lane Count = 0.
		* It is possible for Sink to report Max Link Rate = 0, if it is
		* an eDP device that is reporting specialized link rates in the
		* SUPPORTED_LINK_RATE table.
		*/
		if (dpcd_data[DP_MAX_LANE_COUNT - DP_DPCD_REV] == 0)
		return false;

		link->dpcd_caps.dpcd_rev.raw =
		dpcd_data[DP_DPCD_REV - DP_DPCD_REV];

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