Commit 07bcfd12 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915/gen12: Disable preemption timeout 



Allow super long OpenCL workloads which cannot be preempted within
the default timeout to run out of the box.

v2:
 * Make it stick out more and apply only to RCS. (Chris)

v3:
 * Mention platform override in kconfig. (Joonas)

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
Cc: <stable@vger.kernel.org> # v5.6+
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarMichal Mrozek <Michal.mrozek@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200312115748.29970-1-tvrtko.ursulin@linux.intel.com
parent 70c96e39

drivers/gpu/drm/i915/Kconfig.profile

+4 −0
Original line number Diff line number Diff line
@@ -41,6 +41,10 @@ config DRM_I915_PREEMPT_TIMEOUT 


	  May be 0 to disable the timeout.



	  The compiled in default may get overridden at driver probe time on

	  certain platforms and certain engines which will be reflected in the

	  sysfs control.



config DRM_I915_MAX_REQUEST_BUSYWAIT

	int "Busywait for request completion limit (ns)"

	default 8000 # nanoseconds

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+9 −4
Original line number Diff line number Diff line
@@ -275,6 +275,7 @@ static void intel_engine_sanitize_mmio(struct intel_engine_cs *engine) 
static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)

{

	const struct engine_info *info = &intel_engines[id];

	struct drm_i915_private *i915 = gt->i915;

	struct intel_engine_cs *engine;



	BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
@@ -301,11 +302,11 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id) 
	engine->id = id;

	engine->legacy_idx = INVALID_ENGINE;

	engine->mask = BIT(id);

	engine->i915 = gt->i915;

	engine->i915 = i915;

	engine->gt = gt;

	engine->uncore = gt->uncore;

	engine->hw_id = engine->guc_id = info->hw_id;

	engine->mmio_base = __engine_mmio_base(gt->i915, info->mmio_bases);

	engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases);



	engine->class = info->class;

	engine->instance = info->instance;
@@ -322,11 +323,15 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id) 
	engine->props.timeslice_duration_ms =

		CONFIG_DRM_I915_TIMESLICE_DURATION;



	/* Override to uninterruptible for OpenCL workloads. */

	if (INTEL_GEN(i915) == 12 && engine->class == RENDER_CLASS)

		engine->props.preempt_timeout_ms = 0;



	engine->context_size = intel_engine_context_size(gt, engine->class);

	if (WARN_ON(engine->context_size > BIT(20)))

		engine->context_size = 0;

	if (engine->context_size)

		DRIVER_CAPS(gt->i915)->has_logical_contexts = true;

		DRIVER_CAPS(i915)->has_logical_contexts = true;



	/* Nothing to do here, execute in order of dependencies */

	engine->schedule = NULL;
@@ -342,7 +347,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id) 
	gt->engine_class[info->class][info->instance] = engine;

	gt->engine[id] = engine;



	gt->i915->engine[id] = engine;

	i915->engine[id] = engine;



	return 0;

}

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