Commit 078a55fc authored by Paul Gortmaker's avatar Paul Gortmaker
Browse files

MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code 

commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files.  MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.

[1] https://lkml.org/lkml/2013/5/20/589



[ralf@linux-mips.org: Folded in Paul's followup fix.]

Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 60ffef06

arch/mips/ath79/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ const char *get_system_type(void) 
	return ath79_sys_type;

}



unsigned int __cpuinit get_c0_compare_int(void)

unsigned int get_c0_compare_int(void)

{

	return CP0_LEGACY_COMPARE_IRQ;

}

arch/mips/cavium-octeon/octeon-irq.c

+6 −6
Original line number Diff line number Diff line
@@ -1095,7 +1095,7 @@ static void octeon_irq_ip3_ciu(void) 


static bool octeon_irq_use_ip4;



static void __cpuinit octeon_irq_local_enable_ip4(void *arg)

static void octeon_irq_local_enable_ip4(void *arg)

{

	set_c0_status(STATUSF_IP4);

}
@@ -1110,21 +1110,21 @@ static void (*octeon_irq_ip2)(void); 
static void (*octeon_irq_ip3)(void);

static void (*octeon_irq_ip4)(void);



void __cpuinitdata (*octeon_irq_setup_secondary)(void);

void (*octeon_irq_setup_secondary)(void);



void __cpuinit octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h)

void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h)

{

	octeon_irq_ip4 = h;

	octeon_irq_use_ip4 = true;

	on_each_cpu(octeon_irq_local_enable_ip4, NULL, 1);

}



static void __cpuinit octeon_irq_percpu_enable(void)

static void octeon_irq_percpu_enable(void)

{

	irq_cpu_online();

}



static void __cpuinit octeon_irq_init_ciu_percpu(void)

static void octeon_irq_init_ciu_percpu(void)

{

	int coreid = cvmx_get_core_num();
@@ -1167,7 +1167,7 @@ static void octeon_irq_init_ciu2_percpu(void) 
	cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP2(coreid));

}



static void __cpuinit octeon_irq_setup_secondary_ciu(void)

static void octeon_irq_setup_secondary_ciu(void)

{

	octeon_irq_init_ciu_percpu();

	octeon_irq_percpu_enable();

arch/mips/cavium-octeon/smp.c

+3 −3
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ static void octeon_boot_secondary(int cpu, struct task_struct *idle) 
 * After we've done initial boot, this function is called to allow the

 * board code to clean up state, if needed

 */

static void __cpuinit octeon_init_secondary(void)

static void octeon_init_secondary(void)

{

	unsigned int sr;
@@ -375,7 +375,7 @@ static int octeon_update_boot_vector(unsigned int cpu) 
	return 0;

}



static int __cpuinit octeon_cpu_callback(struct notifier_block *nfb,

static int octeon_cpu_callback(struct notifier_block *nfb,

	unsigned long action, void *hcpu)

{

	unsigned int cpu = (unsigned long)hcpu;
@@ -394,7 +394,7 @@ static int __cpuinit octeon_cpu_callback(struct notifier_block *nfb, 
	return NOTIFY_OK;

}



static int __cpuinit register_cavium_notifier(void)

static int register_cavium_notifier(void)

{

	hotcpu_notifier(octeon_cpu_callback, 0);

	return 0;

arch/mips/include/asm/uasm.h

+13 −24
Original line number Diff line number Diff line
@@ -13,12 +13,8 @@ 


#ifdef CONFIG_EXPORT_UASM

#include <linux/export.h>

#define __uasminit

#define __uasminitdata

#define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)

#else

#define __uasminit __cpuinit

#define __uasminitdata __cpuinitdata

#define UASM_EXPORT_SYMBOL(sym)

#endif
@@ -54,43 +50,36 @@ 
#endif



#define Ip_u1u2u3(op)							\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)



#define Ip_u2u1u3(op)							\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)



#define Ip_u3u1u2(op)							\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)



#define Ip_u1u2s3(op)							\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)



#define Ip_u2s3u1(op)							\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)

void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)



#define Ip_u2u1s3(op)							\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)



#define Ip_u2u1msbu3(op)						\

void __uasminit								\

ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c,	\

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \

	   unsigned int d)



#define Ip_u1u2(op)							\

void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)

void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)



#define Ip_u1s2(op)							\

void __uasminit ISAOPC(op)(u32 **buf, unsigned int a, signed int b)

void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)



#define Ip_u1(op) void __uasminit ISAOPC(op)(u32 **buf, unsigned int a)

#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)



#define Ip_0(op) void __uasminit ISAOPC(op)(u32 **buf)

#define Ip_0(op) void ISAOPC(op)(u32 **buf)



Ip_u2u1s3(_addiu);

Ip_u3u1u2(_addu);
@@ -163,7 +152,7 @@ struct uasm_label { 
	int lab;

};



void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,

void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,

			int lid);

#ifdef CONFIG_64BIT

int ISAFUNC(uasm_in_compat_space_p)(long addr);
@@ -174,7 +163,7 @@ void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr); 
void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);



#define UASM_L_LA(lb)							\

static inline void __uasminit ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \

static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \

{									\

	ISAFUNC(uasm_build_label)(lab, addr, label##lb);		\

}

arch/mips/kernel/bmips_vec.S

+0 −4
Original line number Diff line number Diff line
@@ -28,8 +28,6 @@ 
	.set	mips0

	.endm



	__CPUINIT



/***********************************************************************

 * Alternate CPU1 startup vector for BMIPS4350

 *
@@ -216,8 +214,6 @@ END(bmips_smp_int_vec) 
 * Certain CPUs support extending kseg0 to 1024MB.

 ***********************************************************************/



	__CPUINIT



LEAF(bmips_enable_xks01)



#if defined(CONFIG_XKS01)

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