Commit 070d7d70 authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi
Browse files

PCI: v3-semi: Use inbound resources for setup 



Now that the helpers provide the inbound resources in the host bridge
'dma_ranges' resource list, convert the v3-semi host bridge to use
the resource list to setup the inbound addresses.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarAndrew Murray <andrew.murray@arm.com>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
parent ea4f718e

drivers/pci/controller/pci-v3-semi.c

+16 −22
Original line number Diff line number Diff line
@@ -598,28 +598,30 @@ static int v3_pci_setup_resource(struct v3_pci *v3, 
}



static int v3_get_dma_range_config(struct v3_pci *v3,

				   struct of_pci_range *range,

				   struct resource_entry *entry,

				   u32 *pci_base, u32 *pci_map)

{

	struct device *dev = v3->dev;

	u64 cpu_end = range->cpu_addr + range->size - 1;

	u64 pci_end = range->pci_addr + range->size - 1;

	u64 cpu_addr = entry->res->start;

	u64 cpu_end = entry->res->end;

	u64 pci_end = cpu_end - entry->offset;

	u64 pci_addr = entry->res->start - entry->offset;

	u32 val;



	if (range->pci_addr & ~V3_PCI_BASE_M_ADR_BASE) {

	if (pci_addr & ~V3_PCI_BASE_M_ADR_BASE) {

		dev_err(dev, "illegal range, only PCI bits 31..20 allowed\n");

		return -EINVAL;

	}

	val = ((u32)range->pci_addr) & V3_PCI_BASE_M_ADR_BASE;

	val = ((u32)pci_addr) & V3_PCI_BASE_M_ADR_BASE;

	*pci_base = val;



	if (range->cpu_addr & ~V3_PCI_MAP_M_MAP_ADR) {

	if (cpu_addr & ~V3_PCI_MAP_M_MAP_ADR) {

		dev_err(dev, "illegal range, only CPU bits 31..20 allowed\n");

		return -EINVAL;

	}

	val = ((u32)range->cpu_addr) & V3_PCI_MAP_M_MAP_ADR;

	val = ((u32)cpu_addr) & V3_PCI_MAP_M_MAP_ADR;



	switch (range->size) {

	switch (resource_size(entry->res)) {

	case SZ_1M:

		val |= V3_LB_BASE_ADR_SIZE_1MB;

		break;
@@ -667,8 +669,8 @@ static int v3_get_dma_range_config(struct v3_pci *v3, 
	dev_dbg(dev,

		"DMA MEM CPU: 0x%016llx -> 0x%016llx => "

		"PCI: 0x%016llx -> 0x%016llx base %08x map %08x\n",

		range->cpu_addr, cpu_end,

		range->pci_addr, pci_end,

		cpu_addr, cpu_end,

		pci_addr, pci_end,

		*pci_base, *pci_map);



	return 0;
@@ -677,24 +679,16 @@ static int v3_get_dma_range_config(struct v3_pci *v3, 
static int v3_pci_parse_map_dma_ranges(struct v3_pci *v3,

				       struct device_node *np)

{

	struct of_pci_range range;

	struct of_pci_range_parser parser;

	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(v3);

	struct device *dev = v3->dev;

	struct resource_entry *entry;

	int i = 0;



	if (of_pci_dma_range_parser_init(&parser, np)) {

		dev_err(dev, "missing dma-ranges property\n");

		return -EINVAL;

	}



	/*

	 * Get the dma-ranges from the device tree

	 */

	for_each_of_pci_range(&parser, &range) {

	resource_list_for_each_entry(entry, &bridge->dma_ranges) {

		int ret;

		u32 pci_base, pci_map;



		ret = v3_get_dma_range_config(v3, &range, &pci_base, &pci_map);

		ret = v3_get_dma_range_config(v3, entry, &pci_base, &pci_map);

		if (ret)

			return ret;

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