Unverified Commit 06dfaf1d authored by Maxime Ripard's avatar Maxime Ripard
Browse files

ARM: dts: sunxi: Add missing LVDS resets and clocks 



Some old SoCs, while supporting LVDS, don't list the LVDS clocks and reset
lines. Let's add them when relevant.

Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
parent 0a934343

arch/arm/boot/dts/sun6i-a31.dtsi

+15 −8
Original line number Diff line number Diff line
@@ -286,14 +286,18 @@ 
			reg = <0x01c0c000 0x1000>;

			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&dma 11>;

			resets = <&ccu RST_AHB1_LCD0>;

			reset-names = "lcd";

			resets = <&ccu RST_AHB1_LCD0>,

				 <&ccu RST_AHB1_LVDS>;

			reset-names = "lcd",

				      "lvds";

			clocks = <&ccu CLK_AHB1_LCD0>,

				 <&ccu CLK_LCD0_CH0>,

				 <&ccu CLK_LCD0_CH1>;

				 <&ccu CLK_LCD0_CH1>,

				 <&ccu 15>;

			clock-names = "ahb",

				      "tcon-ch0",

				      "tcon-ch1";

				      "tcon-ch1",

				      "lvds-alt";

			clock-output-names = "tcon0-pixel-clock";

			#clock-cells = <0>;
@@ -336,14 +340,17 @@ 
			reg = <0x01c0d000 0x1000>;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&dma 12>;

			resets = <&ccu RST_AHB1_LCD1>;

			reset-names = "lcd";

			resets = <&ccu RST_AHB1_LCD1>,

				 <&ccu RST_AHB1_LVDS>;

			reset-names = "lcd", "lvds";

			clocks = <&ccu CLK_AHB1_LCD1>,

				 <&ccu CLK_LCD1_CH0>,

				 <&ccu CLK_LCD1_CH1>;

				 <&ccu CLK_LCD1_CH1>,

				 <&ccu 15>;

			clock-names = "ahb",

				      "tcon-ch0",

				      "tcon-ch1";

				      "tcon-ch1",

				      "lvds-alt";

			clock-output-names = "tcon1-pixel-clock";

			#clock-cells = <0>;

arch/arm/boot/dts/sun8i-a23-a33.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -184,13 +184,17 @@ 
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&dma 12>;

			clocks = <&ccu CLK_BUS_LCD>,

				 <&ccu CLK_LCD_CH0>;

				 <&ccu CLK_LCD_CH0>,

				 <&ccu 13>;

			clock-names = "ahb",

				      "tcon-ch0";

				      "tcon-ch0",

				      "lvds-alt";

			clock-output-names = "tcon-pixel-clock";

			#clock-cells = <0>;

			resets = <&ccu RST_BUS_LCD>;

			reset-names = "lcd";

			resets = <&ccu RST_BUS_LCD>,

				 <&ccu RST_BUS_LVDS>;

			reset-names = "lcd",

				      "lvds";

			status = "disabled";



			ports {

arch/arm/boot/dts/sun9i-a80.dtsi

+6 −2
Original line number Diff line number Diff line
@@ -878,8 +878,12 @@ 
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;

			clock-names = "ahb", "tcon-ch0";

			resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>;

			reset-names = "lcd", "edp";

			resets = <&ccu RST_BUS_LCD0>,

				 <&ccu RST_BUS_EDP>,

				 <&ccu RST_BUS_LVDS>;

			reset-names = "lcd",

				      "edp",

				      "lvds";

			clock-output-names = "tcon0-pixel-clock";

			#clock-cells = <0>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE