Commit 06ad4b2f authored by Chris Zhong's avatar Chris Zhong Committed by Heiko Stuebner
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arm64: dts: rockchip: add powerdomain for typec on rk3399 



The tcpc power domain will try to power up/down the power of Type-C PHY.
Hence, we need control it in Type-C PHY driver with the pm_runtime helper.

Signed-off-by: default avatarChris Zhong <zyw@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 2c60dc43

arch/arm64/boot/dts/rockchip/rk3399.dtsi

+2 −0
Original line number Original line Diff line number Diff line
@@ -1148,6 +1148,7 @@ 
		clock-names = "tcpdcore", "tcpdphy-ref";

		clock-names = "tcpdcore", "tcpdphy-ref";

		assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;

		assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;

		assigned-clock-rates = <50000000>;

		assigned-clock-rates = <50000000>;

		power-domains = <&power RK3399_PD_TCPD0>;

		resets = <&cru SRST_UPHY0>,

		resets = <&cru SRST_UPHY0>,

			 <&cru SRST_UPHY0_PIPE_L00>,

			 <&cru SRST_UPHY0_PIPE_L00>,

			 <&cru SRST_P_UPHY0_TCPHY>;

			 <&cru SRST_P_UPHY0_TCPHY>;
@@ -1176,6 +1177,7 @@ 
		clock-names = "tcpdcore", "tcpdphy-ref";

		clock-names = "tcpdcore", "tcpdphy-ref";

		assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;

		assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;

		assigned-clock-rates = <50000000>;

		assigned-clock-rates = <50000000>;

		power-domains = <&power RK3399_PD_TCPD1>;

		resets = <&cru SRST_UPHY1>,

		resets = <&cru SRST_UPHY1>,

			 <&cru SRST_UPHY1_PIPE_L00>,

			 <&cru SRST_UPHY1_PIPE_L00>,

			 <&cru SRST_P_UPHY1_TCPHY>;

			 <&cru SRST_P_UPHY1_TCPHY>;

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