Commit 06a916fe authored by Dave Martin's avatar Dave Martin Committed by Will Deacon
Browse files

arm64: Expose SVE2 features for userspace 



This patch provides support for reporting the presence of SVE2 and
its optional features to userspace.

This will also enable visibility of SVE2 for guests, when KVM
support for SVE-enabled guests is available.

Signed-off-by: default avatarDave Martin <Dave.Martin@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent dd523791

Documentation/arm64/cpu-feature-registers.txt

+16 −0
Original line number Diff line number Diff line
@@ -209,6 +209,22 @@ infrastructure: 
     | AT                           | [35-32] |    y    |

     x--------------------------------------------------x



  6) ID_AA64ZFR0_EL1 - SVE feature ID register 0



     x--------------------------------------------------x

     | Name                         |  bits   | visible |

     |--------------------------------------------------|

     | SM4                          | [43-40] |    y    |

     |--------------------------------------------------|

     | SHA3                         | [35-32] |    y    |

     |--------------------------------------------------|

     | BitPerm                      | [19-16] |    y    |

     |--------------------------------------------------|

     | AES                          | [7-4]   |    y    |

     |--------------------------------------------------|

     | SVEVer                       | [3-0]   |    y    |

     x--------------------------------------------------x



Appendix I: Example

---------------------------

Documentation/arm64/elf_hwcaps.txt

+24 −0
Original line number Diff line number Diff line
@@ -163,6 +163,30 @@ HWCAP_SVE 


    Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001.



HWCAP2_SVE2



    Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.



HWCAP2_SVEAES



    Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.



HWCAP2_SVEPMULL



    Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.



HWCAP2_SVEBITPERM



    Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.



HWCAP2_SVESHA3



    Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.



HWCAP2_SVESM4



    Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.



HWCAP_ASIMDFHM



   Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001.

Documentation/arm64/sve.txt

+17 −0
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@@ -34,6 +34,23 @@ model features for SVE is included in Appendix A. 
  following sections: software that needs to verify that those interfaces are

  present must check for HWCAP_SVE instead.



* On hardware that supports the SVE2 extensions, HWCAP2_SVE2 will also

  be reported in the AT_HWCAP2 aux vector entry.  In addition to this,

  optional extensions to SVE2 may be reported by the presence of:



	HWCAP2_SVE2

	HWCAP2_SVEAES

	HWCAP2_SVEPMULL

	HWCAP2_SVEBITPERM

	HWCAP2_SVESHA3

	HWCAP2_SVESM4



  This list may be extended over time as the SVE architecture evolves.



  These extensions are also reported via the CPU ID register ID_AA64ZFR0_EL1,

  which userspace can read using an MRS instruction.  See elf_hwcaps.txt and

  cpu-feature-registers.txt for details.



* Debuggers should restrict themselves to interacting with the target via the

  NT_ARM_SVE regset.  The recommended way of detecting support for this regset

  is to connect to a target process first and then attempt a

arch/arm64/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -1372,6 +1372,9 @@ config ARM64_SVE 


	  To enable use of this extension on CPUs that implement it, say Y.



	  On CPUs that support the SVE2 extensions, this option will enable

	  those too.



	  Note that for architectural reasons, firmware _must_ implement SVE

	  support when running on SVE capable hardware.  The required support

	  is present in:

arch/arm64/include/asm/hwcap.h

+6 −0
Original line number Diff line number Diff line
@@ -89,6 +89,12 @@ 


#define __khwcap2_feature(x)		(const_ilog2(HWCAP2_ ## x) + 32)

#define KERNEL_HWCAP_DCPODP		__khwcap2_feature(DCPODP)

#define KERNEL_HWCAP_SVE2		__khwcap2_feature(SVE2)

#define KERNEL_HWCAP_SVEAES		__khwcap2_feature(SVEAES)

#define KERNEL_HWCAP_SVEPMULL		__khwcap2_feature(SVEPMULL)

#define KERNEL_HWCAP_SVEBITPERM		__khwcap2_feature(SVEBITPERM)

#define KERNEL_HWCAP_SVESHA3		__khwcap2_feature(SVESHA3)

#define KERNEL_HWCAP_SVESM4		__khwcap2_feature(SVESM4)



/*

 * This yields a mask that user programs can use to figure out what

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