Commit 06a09dc3 authored by Miquel Raynal's avatar Miquel Raynal Committed by Kishon Vijay Abraham I
Browse files

dt-bindings: phy: Add Marvell COMPHY clocks



Marvell CP110 COMPHY block is fed by 3 clocks. Describe each of them in the
bindings.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 4e19a76e
Loading
Loading
Loading
Loading
+10 −0
Original line number Original line Diff line number Diff line
@@ -25,6 +25,13 @@ Required properties:
- #address-cells: should be 1.
- #address-cells: should be 1.
- #size-cells: should be 0.
- #size-cells: should be 0.


Optional properlties:

- clocks: pointers to the reference clocks for this device (CP110 only),
          consequently: MG clock, MG Core clock, AXI clock.
- clock-names: names of used clocks for CP110 only, must be :
               "mg_clk", "mg_core_clk" and "axi_clk".

A sub-node is required for each comphy lane provided by the comphy.
A sub-node is required for each comphy lane provided by the comphy.


Required properties (child nodes):
Required properties (child nodes):
@@ -39,6 +46,9 @@ Examples:
		compatible = "marvell,comphy-cp110";
		compatible = "marvell,comphy-cp110";
		reg = <0x120000 0x6000>;
		reg = <0x120000 0x6000>;
		marvell,system-controller = <&cpm_syscon0>;
		marvell,system-controller = <&cpm_syscon0>;
		clocks = <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
			 <&CP110_LABEL(clk) 1 18>;
		clock-names = "mg_clk", "mg_core_clk", "axi_clk";
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;