Merge remote-tracking branches 'asoc/fix/adsp', 'asoc/fix/davinci',... (063e01a2) · Commits · 戴 / test

sound/soc/codecs/max98090.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -1311,6 +1311,10 @@ static const struct snd_soc_dapm_route max98090_dapm_routes[] = {
		{"MIC1 Input", NULL, "MIC1"},
		{"MIC2 Input", NULL, "MIC2"},

		{"DMICL", NULL, "DMICL_ENA"},
		{"DMICL", NULL, "DMICR_ENA"},
		{"DMICR", NULL, "DMICL_ENA"},
		{"DMICR", NULL, "DMICR_ENA"},
		{"DMICL", NULL, "AHPF"},
		{"DMICR", NULL, "AHPF"},

		@@ -1368,8 +1372,6 @@ static const struct snd_soc_dapm_route max98090_dapm_routes[] = {
		{"DMIC Mux", "ADC", "ADCR"},
		{"DMIC Mux", "DMIC", "DMICL"},
		{"DMIC Mux", "DMIC", "DMICR"},
		{"DMIC Mux", "DMIC", "DMICL_ENA"},
		{"DMIC Mux", "DMIC", "DMICR_ENA"},

		{"LBENL Mux", "Normal", "DMIC Mux"},
		{"LBENL Mux", "Loopback", "LTENL Mux"},
		@@ -1395,8 +1397,8 @@ static const struct snd_soc_dapm_route max98090_dapm_routes[] = {
		{"STENL Mux", "Sidetone Left", "DMICL"},
		{"STENR Mux", "Sidetone Right", "ADCR"},
		{"STENR Mux", "Sidetone Right", "DMICR"},
		{"DACL", "NULL", "STENL Mux"},
		{"DACR", "NULL", "STENL Mux"},
		{"DACL", NULL, "STENL Mux"},
		{"DACR", NULL, "STENR Mux"},

		{"AIFINL", NULL, "SHDN"},
		{"AIFINR", NULL, "SHDN"},

sound/soc/codecs/sigmadsp.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -159,6 +159,13 @@ int _process_sigma_firmware(struct device *dev,
		goto done;
		}

		if (ssfw_head->version != 1) {
		dev_err(dev,
		"Failed to load firmware: Invalid version %d. Supported firmware versions: 1\n",
		ssfw_head->version);
		goto done;
		}

		crc = crc32(0, fw->data + sizeof(*ssfw_head),
		fw->size - sizeof(*ssfw_head));
		pr_debug("%s: crc=%x\n", __func__, crc);

sound/soc/codecs/tlv320aic31xx.c

+7 −6

Original line number	Diff line number	Diff line
		@@ -911,13 +911,14 @@ static int aic31xx_set_dai_sysclk(struct snd_soc_dai *codec_dai,
		}
		aic31xx->p_div = i;

		for (i = 0; aic31xx_divs[i].mclk_p != freq/aic31xx->p_div; i++) {
		for (i = 0; i < ARRAY_SIZE(aic31xx_divs) &&
		aic31xx_divs[i].mclk_p != freq/aic31xx->p_div; i++)
		;
		if (i == ARRAY_SIZE(aic31xx_divs)) {
		dev_err(aic31xx->dev, "%s: Unsupported frequency %d\n",
		__func__, freq);
		return -EINVAL;
		}
		}

		/* set clock on MCLK, BCLK, or GPIO1 as PLL input */
		snd_soc_update_bits(codec, AIC31XX_CLKMUX, AIC31XX_PLL_CLKIN_MASK,

sound/soc/codecs/wm_adsp.c

+2 −9

Original line number	Diff line number	Diff line
		@@ -1595,13 +1595,6 @@ static void wm_adsp2_boot_work(struct work_struct *work)
		if (ret != 0)
		goto err;

		ret = regmap_update_bits_async(dsp->regmap,
		dsp->base + ADSP2_CONTROL,
		ADSP2_CORE_ENA,
		ADSP2_CORE_ENA);
		if (ret != 0)
		goto err;

		dsp->running = true;

		return;
		@@ -1651,8 +1644,8 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w,

		ret = regmap_update_bits(dsp->regmap,
		dsp->base + ADSP2_CONTROL,
		ADSP2_START,
		ADSP2_START);
		ADSP2_CORE_ENA \| ADSP2_START,
		ADSP2_CORE_ENA \| ADSP2_START);
		if (ret != 0)
		goto err;
		break;

sound/soc/davinci/davinci-mcasp.c

+40 −39

Original line number	Diff line number	Diff line
		@@ -154,9 +154,9 @@ static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp)

		static void mcasp_start_rx(struct davinci_mcasp *mcasp)
		{
		/* Start clocks */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST);
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST);

		/*
		* When ASYNC == 0 the transmit and receive sections operate
		* synchronously from the transmit clock and frame sync. We need to make
		@@ -167,47 +167,36 @@ static void mcasp_start_rx(struct davinci_mcasp *mcasp)
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
		}

		/* Activate serializer(s) */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR);
		mcasp_set_reg(mcasp, DAVINCI_MCASP_RXBUF_REG, 0);

		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST);
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST);
		mcasp_set_reg(mcasp, DAVINCI_MCASP_RXBUF_REG, 0);

		/* Release RX state machine */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST);
		/* Release Frame Sync generator */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST);

		if (mcasp_is_synchronous(mcasp))
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST);
		}

		static void mcasp_start_tx(struct davinci_mcasp *mcasp)
		{
		u8 offset = 0, i;
		u32 cnt;

		/* Start clocks */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST);
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
		/* Activate serializer(s) */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR);
		mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0);

		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSMRST);
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST);
		mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0);
		for (i = 0; i < mcasp->num_serializer; i++) {
		if (mcasp->serial_dir[i] == TX_MODE) {
		offset = i;
		break;
		}
		}

		/* wait for TX ready */
		/* wait for XDATA to be cleared */
		cnt = 0;
		while (!(mcasp_get_reg(mcasp, DAVINCI_MCASP_XRSRCTL_REG(offset)) &
		TXSTATE) && (cnt < 100000))
		while (!(mcasp_get_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG) &
		~XRDATA) && (cnt < 100000))
		cnt++;

		mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0);
		/* Release TX state machine */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSMRST);
		/* Release Frame Sync generator */
		mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST);
		}

		static void davinci_mcasp_start(struct davinci_mcasp *mcasp, int stream)
		@@ -244,6 +233,12 @@ static void mcasp_stop_rx(struct davinci_mcasp *mcasp)

		mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, 0);
		mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF);

		if (mcasp->rxnumevt) { /* disable FIFO */
		u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;

		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
		}
		}

		static void mcasp_stop_tx(struct davinci_mcasp *mcasp)
		@@ -259,28 +254,23 @@ static void mcasp_stop_tx(struct davinci_mcasp *mcasp)

		mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, val);
		mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF);

		if (mcasp->txnumevt) { /* disable FIFO */
		u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;

		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
		}
		}

		static void davinci_mcasp_stop(struct davinci_mcasp *mcasp, int stream)
		{
		u32 reg;

		mcasp->streams--;

		if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
		if (mcasp->txnumevt) { /* disable FIFO */
		reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;
		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
		}
		if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		mcasp_stop_tx(mcasp);
		} else {
		if (mcasp->rxnumevt) { /* disable FIFO */
		reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;
		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
		}
		else
		mcasp_stop_rx(mcasp);
		}
		}

		static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
		unsigned int fmt)
		@@ -500,8 +490,17 @@ static int davinci_config_channel_size(struct davinci_mcasp *mcasp,
		* both left and right channels), so it has to be divided by number of
		* tdm-slots (for I2S - divided by 2).
		*/
		if (mcasp->bclk_lrclk_ratio)
		word_length = mcasp->bclk_lrclk_ratio / mcasp->tdm_slots;
		if (mcasp->bclk_lrclk_ratio) {
		u32 slot_length = mcasp->bclk_lrclk_ratio / mcasp->tdm_slots;

		/*
		* When we have more bclk then it is needed for the data, we
		* need to use the rotation to move the received samples to have
		* correct alignment.
		*/
		rx_rotate = (slot_length - word_length) / 4;
		word_length = slot_length;
		}

		/* mapping of the XSSZ bit-field as described in the datasheet */
		fmt = (word_length >> 1) - 1;
		@@ -971,6 +970,7 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = {
		},
		.ops = &davinci_mcasp_dai_ops,

		.symmetric_samplebits = 1,
		},
		{
		.name = "davinci-mcasp.1",
		@@ -1235,6 +1235,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
		ret = pm_runtime_get_sync(&pdev->dev);
		if (IS_ERR_VALUE(ret)) {
		dev_err(&pdev->dev, "pm_runtime_get_sync() failed\n");
		pm_runtime_disable(&pdev->dev);
		return ret;
		}

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