Commit 061489c6 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/dsb: single register write function for DSB. 



DSB support single register write through opcode 0x1. Generic
api created which accumulate all single register write in a batch
buffer and once DSB is triggered, it will program all the registers
at the same time.

v1: Initial version.
v2: Unused macro removed and cosmetic changes done. (Shashank)
v3: set free_pos to zero in dsb-put() instead dsb-get() and
a cosmetic change. (Shashank)
v4: macro of indexed-write is moved. (Shashank)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: default avatarShashank Sharma <shashank.sharma@intel.com>
Signed-off-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920115930.27829-4-animesh.manna@intel.com
parent 67f3b58f

drivers/gpu/drm/i915/display/intel_dsb.c

+29 −0
Original line number Diff line number Diff line
@@ -9,6 +9,12 @@ 


#define DSB_BUF_SIZE    (2 * PAGE_SIZE)



/* DSB opcodes. */

#define DSB_OPCODE_SHIFT		24

#define DSB_OPCODE_MMIO_WRITE		0x1

#define DSB_BYTE_EN			0xF

#define DSB_BYTE_EN_SHIFT		20



struct intel_dsb *

intel_dsb_get(struct intel_crtc *crtc)

{
@@ -76,5 +82,28 @@ void intel_dsb_put(struct intel_dsb *dsb) 
		i915_vma_unpin_and_release(&dsb->vma, 0);

		mutex_unlock(&i915->drm.struct_mutex);

		dsb->cmd_buf = NULL;

		dsb->free_pos = 0;

	}

}



void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val)

{

	struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	u32 *buf = dsb->cmd_buf;



	if (!buf) {

		I915_WRITE(reg, val);

		return;

	}



	if (WARN_ON(dsb->free_pos >= DSB_BUF_SIZE)) {

		DRM_DEBUG_KMS("DSB buffer overflow\n");

		return;

	}



	buf[dsb->free_pos++] = val;

	buf[dsb->free_pos++] = (DSB_OPCODE_MMIO_WRITE  << DSB_OPCODE_SHIFT) |

			       (DSB_BYTE_EN << DSB_BYTE_EN_SHIFT) |

			       i915_mmio_reg_offset(reg);

}

drivers/gpu/drm/i915/display/intel_dsb.h

+9 −0
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@ 


#include <linux/types.h>



#include "i915_reg.h"



struct intel_crtc;

struct i915_vma;
@@ -24,10 +26,17 @@ struct intel_dsb { 
	enum dsb_id id;

	u32 *cmd_buf;

	struct i915_vma *vma;



	/*

	 * free_pos will point the first free entry position

	 * and help in calculating tail of command buffer.

	 */

	int free_pos;

};



struct intel_dsb *

intel_dsb_get(struct intel_crtc *crtc);

void intel_dsb_put(struct intel_dsb *dsb);

void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val);



#endif

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