Unverified Commit 05e6da74 authored Oct 01, 2019 by Paul Burton

MIPS: barrier: Clean up __smp_mb() definition



We #ifdef on Cavium Octeon CPUs, but emit the same sync instruction in
both cases. Remove the #ifdef & simply expand to the __sync() macro.

Whilst here indent the strong ordering case definitions to match the
indentation of the weak ordering ones, helping readability.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org

parent 21e3134b

arch/mips/include/asm/barrier.h

+4 −8

Original line number	Diff line number	Diff line
		@@ -89,11 +89,7 @@ static inline void wmb(void)
		#endif /* !CONFIG_CPU_HAS_WB */

		#if defined(CONFIG_WEAK_ORDERING)
		# ifdef CONFIG_CPU_CAVIUM_OCTEON
		# define __smp_mb() __sync()
		# else
		# define __smp_mb() __asm__ __volatile__("sync" : : :"memory")
		# endif
		# define __smp_rmb() rmb()
		# define __smp_wmb() wmb()
		#else

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