Commit 05564d0a authored by Aviad Yehezkel's avatar Aviad Yehezkel Committed by Saeed Mahameed
Browse files

net/mlx5: Add flow-steering commands for FPGA IPSec implementation 



In order to add a context to the FPGA, we need to get both the software
transform context (which includes the keys, etc) and the
source/destination IPs (which are included in the steering
rule). Therefore, we register new set of firmware like commands for
the FPGA. Each time a rule is added, the steering core infrastructure
calls the FPGA command layer. If the rule is intended for the FPGA,
it combines the IPs information with the software transformation
context and creates the respective hardware transform.
Afterwards, it calls the standard steering command layer.

Signed-off-by: default avatarAviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent d6c4f029

drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.c

+7 −0
Original line number Diff line number Diff line
@@ -100,3 +100,10 @@ void mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm) 
	mlx5_fpga_esp_destroy_xfrm(xfrm);

}

EXPORT_SYMBOL_GPL(mlx5_accel_esp_destroy_xfrm);



int mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,

			       const struct mlx5_accel_esp_xfrm_attrs *attrs)

{

	return mlx5_fpga_esp_modify_xfrm(xfrm, attrs);

}

EXPORT_SYMBOL_GPL(mlx5_accel_esp_modify_xfrm);

drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c

+724 −0

File changed.

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drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h

+24 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
#define __MLX5_FPGA_IPSEC_H__



#include "accel/ipsec.h"

#include "fs_cmd.h"



#ifdef CONFIG_MLX5_FPGA
@@ -52,12 +53,18 @@ void mlx5_fpga_ipsec_delete_sa_ctx(void *context); 


int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);

void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);

void mlx5_fpga_ipsec_build_fs_cmds(void);



struct mlx5_accel_esp_xfrm *

mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,

			  const struct mlx5_accel_esp_xfrm_attrs *attrs,

			  u32 flags);

void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm);

int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,

			      const struct mlx5_accel_esp_xfrm_attrs *attrs);



const struct mlx5_flow_cmds *

mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type);



#else
@@ -101,6 +108,10 @@ static inline void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev) 
{

}



static inline void mlx5_fpga_ipsec_build_fs_cmds(void)

{

}



static inline struct mlx5_accel_esp_xfrm *

mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,

			  const struct mlx5_accel_esp_xfrm_attrs *attrs,
@@ -113,6 +124,19 @@ static inline void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm) 
{

}



static inline int

mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,

			  const struct mlx5_accel_esp_xfrm_attrs *attrs)

{

	return -EOPNOTSUPP;

}



static inline const struct mlx5_flow_cmds *

mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type)

{

	return mlx5_fs_cmd_get_default(type);

}



#endif /* CONFIG_MLX5_FPGA */



#endif	/* __MLX5_FPGA_SADB_H__ */

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c

+5 −0

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drivers/net/ethernet/mellanox/mlx5/core/main.c

+2 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ 
#include "eswitch.h"

#include "lib/mlx5.h"

#include "fpga/core.h"

#include "fpga/ipsec.h"

#include "accel/ipsec.h"

#include "lib/clock.h"
@@ -1658,6 +1659,7 @@ static int __init init(void) 
	get_random_bytes(&sw_owner_id, sizeof(sw_owner_id));



	mlx5_core_verify_params();

	mlx5_fpga_ipsec_build_fs_cmds();

	mlx5_register_debugfs();



	err = pci_register_driver(&mlx5_core_driver);

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