Commit 05425249 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Generalise wait for execlists to be idle 



The code to check for execlists completion is generic, so move it to
intel_engine_cs.c, where we can reuse the new intel_engine_is_idle().

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170303121947.20482-2-chris@chris-wilson.co.uk


Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
parent 5400367a

drivers/gpu/drm/i915/i915_gem.c

+4 −4
Original line number Diff line number Diff line
@@ -2959,8 +2959,8 @@ i915_gem_idle_work_handler(struct work_struct *work) 
	 * new request is submitted.

	 */

	wait_for(READ_ONCE(dev_priv->gt.active_requests) ||

		 intel_execlists_idle(dev_priv), 10);



		 intel_engines_are_idle(dev_priv),

		 10);

	if (READ_ONCE(dev_priv->gt.active_requests))

		return;
@@ -2985,7 +2985,7 @@ i915_gem_idle_work_handler(struct work_struct *work) 
	if (dev_priv->gt.active_requests)

		goto out_unlock;



	if (wait_for(intel_execlists_idle(dev_priv), 10))

	if (wait_for(intel_engines_are_idle(dev_priv), 10))

		DRM_ERROR("Timeout waiting for engines to idle\n");



	for_each_engine(engine, dev_priv, id) {
@@ -4287,7 +4287,7 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) 
	 * reset the GPU back to its idle, low power state.

	 */

	WARN_ON(dev_priv->gt.awake);

	WARN_ON(!intel_execlists_idle(dev_priv));

	WARN_ON(!intel_engines_are_idle(dev_priv));



	/*

	 * Neither the BIOS, ourselves or any other kernel

drivers/gpu/drm/i915/intel_engine_cs.c

+13 −0
Original line number Diff line number Diff line
@@ -1102,6 +1102,19 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine) 
	return true;

}



bool intel_engines_are_idle(struct drm_i915_private *dev_priv)

{

	struct intel_engine_cs *engine;

	enum intel_engine_id id;



	for_each_engine(engine, dev_priv, id) {

		if (!intel_engine_is_idle(engine))

			return false;

	}



	return true;

}



#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)

#include "selftests/mock_engine.c"

#endif

drivers/gpu/drm/i915/intel_lrc.c

+0 −28
Original line number Diff line number Diff line
@@ -498,34 +498,6 @@ static bool execlists_elsp_idle(struct intel_engine_cs *engine) 
	return !engine->execlist_port[0].request;

}



/**

 * intel_execlists_idle() - Determine if all engine submission ports are idle

 * @dev_priv: i915 device private

 *

 * Return true if there are no requests pending on any of the submission ports

 * of any engines.

 */

bool intel_execlists_idle(struct drm_i915_private *dev_priv)

{

	struct intel_engine_cs *engine;

	enum intel_engine_id id;



	if (!i915.enable_execlists)

		return true;



	for_each_engine(engine, dev_priv, id) {

		/* Interrupt/tasklet pending? */

		if (test_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted))

			return false;



		/* Both ports drained, no more ELSP submission? */

		if (!execlists_elsp_idle(engine))

			return false;

	}



	return true;

}



static bool execlists_elsp_ready(const struct intel_engine_cs *engine)

{

	const struct execlist_port *port = engine->execlist_port;

drivers/gpu/drm/i915/intel_lrc.h

+0 −1
Original line number Diff line number Diff line
@@ -88,6 +88,5 @@ uint64_t intel_lr_context_descriptor(struct i915_gem_context *ctx, 
int intel_sanitize_enable_execlists(struct drm_i915_private *dev_priv,

				    int enable_execlists);

void intel_execlists_enable_submission(struct drm_i915_private *dev_priv);

bool intel_execlists_idle(struct drm_i915_private *dev_priv);



#endif /* _INTEL_LRC_H_ */

drivers/gpu/drm/i915/intel_ringbuffer.h

+1 −0
Original line number Diff line number Diff line
@@ -665,5 +665,6 @@ static inline u32 *gen8_emit_pipe_control(u32 *batch, u32 flags, u32 offset) 
}



bool intel_engine_is_idle(struct intel_engine_cs *engine);

bool intel_engines_are_idle(struct drm_i915_private *dev_priv);



#endif /* _INTEL_RINGBUFFER_H_ */

CRA Git | Maintained and supported by SUSTech CRA and CCSE