MIPS: Ingenic: Disable broken BTB lookup optimization. (053951dd) · Commits · 戴 / test

In order to further reduce power consumption, the XBurst core by default attempts to avoid branch target buffer lookups by detecting & special casing loops. This feature will cause BogoMIPS and lpj calculate in error. Set cp0 config7 bit 4 to disable this feature. Signed-off-by:

Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by:

Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: ralf@linux-mips.org Cc: paul@crapouillou.net Cc: jhogan@kernel.org Cc: malat@debian.org Cc: gregkh@linuxfoundation.org Cc: tglx@linutronix.de Cc: allison@lohutok.net Cc: syq@debian.org Cc: chenhc@lemote.com Cc: jiaxun.yang@flygoat.com

arch/mips/include/asm/mipsregs.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -689,6 +689,9 @@
		#define MIPS_CONF7_IAR (_ULCAST_(1) << 10)
		#define MIPS_CONF7_AR (_ULCAST_(1) << 16)

		/* Ingenic Config7 bits */
		#define MIPS_CONF7_BTB_LOOP_EN (_ULCAST_(1) << 4)

		/* Config7 Bits specific to MIPS Technologies. */

		/* Performance counters implemented Per TC */
		@@ -2813,6 +2816,7 @@ __BUILD_SET_C0(status)
		__BUILD_SET_C0(cause)
		__BUILD_SET_C0(config)
		__BUILD_SET_C0(config5)
		__BUILD_SET_C0(config7)
		__BUILD_SET_C0(intcontrol)
		__BUILD_SET_C0(intctl)
		__BUILD_SET_C0(srsmap)

arch/mips/kernel/cpu-probe.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -1946,6 +1946,13 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
		c->cputype = CPU_XBURST;
		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
		__cpu_name[cpu] = "Ingenic JZRISC";
		/*
		* The XBurst core by default attempts to avoid branch target
		* buffer lookups by detecting & special casing loops. This
		* feature will cause BogoMIPS and lpj calculate in error.
		* Set cp0 config7 bit 4 to disable this feature.
		*/
		set_c0_config7(MIPS_CONF7_BTB_LOOP_EN);
		break;
		default:
		panic("Unknown Ingenic Processor ID!");

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