Commit 04bd4638 authored by Sujith's avatar Sujith Committed by John W. Linville
Browse files

ath9k: Use cleaner debug masks 



Remove all the useless __func__ prefixes in debug messages,
and replace the DPRINTF macro with a function.

Signed-off-by: default avatarSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent d9a1f486

drivers/net/wireless/ath9k/ani.c

+16 −18
Original line number Diff line number Diff line
@@ -53,8 +53,8 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah, 


		if (level >= ARRAY_SIZE(ahp->ah_totalSizeDesired)) {

			DPRINTF(ah->ah_sc, ATH_DBG_ANI,

				"%s: level out of range (%u > %u)\n",

				__func__, level,

				"level out of range (%u > %u)\n",

				level,

				(unsigned)ARRAY_SIZE(ahp->ah_totalSizeDesired));

			return false;

		}
@@ -158,8 +158,8 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah, 


		if (level >= ARRAY_SIZE(firstep)) {

			DPRINTF(ah->ah_sc, ATH_DBG_ANI,

				"%s: level out of range (%u > %u)\n",

				__func__, level,

				"level out of range (%u > %u)\n",

				level,

				(unsigned) ARRAY_SIZE(firstep));

			return false;

		}
@@ -180,8 +180,8 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah, 


		if (level >= ARRAY_SIZE(cycpwrThr1)) {

			DPRINTF(ah->ah_sc, ATH_DBG_ANI,

				"%s: level out of range (%u > %u)\n",

				__func__, level,

				"level out of range (%u > %u)\n",

				level,

				(unsigned)

				ARRAY_SIZE(cycpwrThr1));

			return false;
@@ -200,11 +200,11 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah, 
		break;

	default:

		DPRINTF(ah->ah_sc, ATH_DBG_ANI,

			"%s: invalid cmd %u\n", __func__, cmd);

			"invalid cmd %u\n", cmd);

		return false;

	}



	DPRINTF(ah->ah_sc, ATH_DBG_ANI, "%s: ANI parameters:\n", __func__);

	DPRINTF(ah->ah_sc, ATH_DBG_ANI, "ANI parameters:\n");

	DPRINTF(ah->ah_sc, ATH_DBG_ANI,

		"noiseImmunityLevel=%d, spurImmunityLevel=%d, "

		"ofdmWeakSigDetectOff=%d\n",
@@ -262,8 +262,8 @@ static void ath9k_ani_restart(struct ath_hal *ah) 
				AR_PHY_COUNTMAX - aniState->cckTrigHigh;

		}

		DPRINTF(ah->ah_sc, ATH_DBG_ANI,

			"%s: Writing ofdmbase=%u   cckbase=%u\n",

			__func__, aniState->ofdmPhyErrBase,

			"Writing ofdmbase=%u   cckbase=%u\n",

			aniState->ofdmPhyErrBase,

			aniState->cckPhyErrBase);

		REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase);

		REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase);
@@ -490,8 +490,7 @@ void ath9k_ani_reset(struct ath_hal *ah) 
	if (DO_ANI(ah) && ah->ah_opmode != ATH9K_M_STA

	    && ah->ah_opmode != ATH9K_M_IBSS) {

		DPRINTF(ah->ah_sc, ATH_DBG_ANI,

			"%s: Reset ANI state opmode %u\n", __func__,

			ah->ah_opmode);

			"Reset ANI state opmode %u\n", ah->ah_opmode);

		ahp->ah_stats.ast_ani_reset++;



		ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0);
@@ -581,9 +580,9 @@ void ath9k_hw_ani_monitor(struct ath_hal *ah, 
		    phyCnt2 < aniState->cckPhyErrBase) {

			if (phyCnt1 < aniState->ofdmPhyErrBase) {

				DPRINTF(ah->ah_sc, ATH_DBG_ANI,

					"%s: phyCnt1 0x%x, resetting "

					"phyCnt1 0x%x, resetting "

					"counter value to 0x%x\n",

					__func__, phyCnt1,

					phyCnt1,

					aniState->ofdmPhyErrBase);

				REG_WRITE(ah, AR_PHY_ERR_1,

					  aniState->ofdmPhyErrBase);
@@ -592,9 +591,9 @@ void ath9k_hw_ani_monitor(struct ath_hal *ah, 
			}

			if (phyCnt2 < aniState->cckPhyErrBase) {

				DPRINTF(ah->ah_sc, ATH_DBG_ANI,

					"%s: phyCnt2 0x%x, resetting "

					"phyCnt2 0x%x, resetting "

					"counter value to 0x%x\n",

					__func__, phyCnt2,

					phyCnt2,

					aniState->cckPhyErrBase);

				REG_WRITE(ah, AR_PHY_ERR_2,

					  aniState->cckPhyErrBase);
@@ -692,8 +691,7 @@ u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hal *ah, 


	if (cycles == 0 || cycles > cc) {

		DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,

			"%s: cycle counter wrap. ExtBusy = 0\n",

			__func__);

			"cycle counter wrap. ExtBusy = 0\n");

		good = 0;

	} else {

		u32 cc_d = cc - cycles;

drivers/net/wireless/ath9k/beacon.c

+35 −42
Original line number Diff line number Diff line
@@ -41,8 +41,7 @@ static int ath_beaconq_config(struct ath_softc *sc) 


	if (!ath9k_hw_set_txq_props(ah, sc->sc_bhalq, &qi)) {

		DPRINTF(sc, ATH_DBG_FATAL,

			"%s: unable to update h/w beacon queue parameters\n",

			__func__);

			"unable to update h/w beacon queue parameters\n");

		return 0;

	} else {

		ath9k_hw_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
@@ -53,8 +52,8 @@ static int ath_beaconq_config(struct ath_softc *sc) 
static void ath_bstuck_process(struct ath_softc *sc)

{

	DPRINTF(sc, ATH_DBG_BEACON,

		"%s: stuck beacon; resetting (bmiss count %u)\n",

		__func__, sc->sc_bmisscount);

		"stuck beacon; resetting (bmiss count %u)\n",

		sc->sc_bmisscount);

	ath_reset(sc, false);

}
@@ -76,8 +75,7 @@ static void ath_beacon_setup(struct ath_softc *sc, 
	int ctsrate = 0;

	int ctsduration = 0;



	DPRINTF(sc, ATH_DBG_BEACON, "%s: m %p len %u\n",

		__func__, skb, skb->len);

	DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);



	/* setup descriptors */

	ds = bf->bf_desc;
@@ -158,8 +156,8 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) 
	cabq = sc->sc_cabq;



	if (avp->av_bcbuf == NULL) {

		DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",

			__func__, avp, avp->av_bcbuf);

		DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",

			avp, avp->av_bcbuf);

		return NULL;

	}
@@ -216,7 +214,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) 
		if (sc->sc_nvaps > 1) {

			ath_tx_draintxq(sc, cabq, false);

			DPRINTF(sc, ATH_DBG_BEACON,

				"%s: flush previous cabq traffic\n", __func__);

				"flush previous cabq traffic\n");

		}

	}
@@ -253,8 +251,8 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id) 
	avp = (void *)vif->drv_priv;



	if (avp->av_bcbuf == NULL) {

		DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",

			__func__, avp, avp != NULL ? avp->av_bcbuf : NULL);

		DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",

			avp, avp != NULL ? avp->av_bcbuf : NULL);

		return;

	}

	bf = avp->av_bcbuf;
@@ -266,7 +264,7 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id) 
	/* NB: caller is known to have already stopped tx dma */

	ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);

	ath9k_hw_txstart(ah, sc->sc_bhalq);

	DPRINTF(sc, ATH_DBG_BEACON, "%s: TXDP%u = %llx (%p)\n", __func__,

	DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",

		sc->sc_bhalq, ito64(bf->bf_daddr), bf->bf_desc);

}
@@ -351,8 +349,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id) 
	 */

	skb = ieee80211_beacon_get(sc->hw, vif);

	if (skb == NULL) {

		DPRINTF(sc, ATH_DBG_BEACON, "%s: cannot get skb\n",

			__func__);

		DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");

		return -ENOMEM;

	}
@@ -388,8 +385,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id) 
		val = cpu_to_le64(tsfadjust << 10);     /* TU->TSF */



		DPRINTF(sc, ATH_DBG_BEACON,

			"%s: %s beacons, bslot %d intval %u tsfadjust %llu\n",

			__func__, "stagger",

			"stagger beacons, bslot %d intval %u tsfadjust %llu\n",

			avp->av_bslot, intval, (unsigned long long)tsfadjust);



		hdr = (struct ieee80211_hdr *)skb->data;
@@ -468,40 +464,39 @@ void ath9k_beacon_tasklet(unsigned long data) 
		if (sc->sc_bmisscount < BSTUCK_THRESH) {

			if (sc->sc_flags & SC_OP_NO_RESET) {

				DPRINTF(sc, ATH_DBG_BEACON,

					"%s: missed %u consecutive beacons\n",

					__func__, sc->sc_bmisscount);

					"missed %u consecutive beacons\n",

					sc->sc_bmisscount);

				if (show_cycles) {

					/*

					 * Display cycle counter stats from HW

					 * to aide in debug of stickiness.

					 */

					DPRINTF(sc, ATH_DBG_BEACON,

						"%s: busy times: rx_clear=%d, "

						"busy times: rx_clear=%d, "

						"rx_frame=%d, tx_frame=%d\n",

						__func__, rx_clear, rx_frame,

						rx_clear, rx_frame,

						tx_frame);

				} else {

					DPRINTF(sc, ATH_DBG_BEACON,

						"%s: unable to obtain "

						"busy times\n", __func__);

						"unable to obtain "

						"busy times\n");

				}

			} else {

				DPRINTF(sc, ATH_DBG_BEACON,

					"%s: missed %u consecutive beacons\n",

					__func__, sc->sc_bmisscount);

					"missed %u consecutive beacons\n",

					sc->sc_bmisscount);

			}

		} else if (sc->sc_bmisscount >= BSTUCK_THRESH) {

			if (sc->sc_flags & SC_OP_NO_RESET) {

				if (sc->sc_bmisscount == BSTUCK_THRESH) {

					DPRINTF(sc, ATH_DBG_BEACON,

						"%s: beacon is officially "

						"stuck\n", __func__);

						"beacon is officially "

						"stuck\n");

					ath9k_hw_dmaRegDump(ah);

				}

			} else {

				DPRINTF(sc, ATH_DBG_BEACON,

					"%s: beacon is officially stuck\n",

					__func__);

					"beacon is officially stuck\n");

				ath_bstuck_process(sc);

			}

		}
@@ -511,12 +506,12 @@ void ath9k_beacon_tasklet(unsigned long data) 
	if (sc->sc_bmisscount != 0) {

		if (sc->sc_flags & SC_OP_NO_RESET) {

			DPRINTF(sc, ATH_DBG_BEACON,

				"%s: resume beacon xmit after %u misses\n",

				__func__, sc->sc_bmisscount);

				"resume beacon xmit after %u misses\n",

				sc->sc_bmisscount);

		} else {

			DPRINTF(sc, ATH_DBG_BEACON,

				"%s: resume beacon xmit after %u misses\n",

				__func__, sc->sc_bmisscount);

				"resume beacon xmit after %u misses\n",

				sc->sc_bmisscount);

		}

		sc->sc_bmisscount = 0;

	}
@@ -536,8 +531,8 @@ void ath9k_beacon_tasklet(unsigned long data) 
	if_id = sc->sc_bslot[(slot + 1) % ATH_BCBUF];



	DPRINTF(sc, ATH_DBG_BEACON,

		"%s: slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",

		__func__, slot, (unsigned long long)tsf, tsftu,

		"slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",

		slot, (unsigned long long)tsf, tsftu,

		intval, if_id);



	bfaddr = 0;
@@ -580,8 +575,7 @@ void ath9k_beacon_tasklet(unsigned long data) 
		 */

		if (!ath9k_hw_stoptxdma(ah, sc->sc_bhalq)) {

			DPRINTF(sc, ATH_DBG_FATAL,

				"%s: beacon queue %u did not stop?\n",

				__func__, sc->sc_bhalq);

				"beacon queue %u did not stop?\n", sc->sc_bhalq);

			/* NB: the HAL still stops DMA, so proceed */

		}
@@ -658,8 +652,8 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) 
	else if (intval)	/* NB: can be 0 for monitor mode */

		nexttbtt = roundup(nexttbtt, intval);



	DPRINTF(sc, ATH_DBG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",

		__func__, nexttbtt, intval, conf.beacon_interval);

	DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",

		nexttbtt, intval, conf.beacon_interval);



	/* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */

	if (sc->sc_ah->ah_opmode == ATH9K_M_STA) {
@@ -746,7 +740,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) 
			bs.bs_sleepduration = bs.bs_dtimperiod;



		DPRINTF(sc, ATH_DBG_BEACON,

			"%s: tsf %llu "

			"tsf %llu "

			"tsf:tu %u "

			"intval %u "

			"nexttbtt %u "
@@ -758,7 +752,6 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) 
			"maxdur %u "

			"next %u "

			"timoffset %u\n",

			__func__,

			(unsigned long long)tsf, tsftu,

			bs.bs_intval,

			bs.bs_nexttbtt,
@@ -798,8 +791,8 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) 
			}

#undef FUDGE

			DPRINTF(sc, ATH_DBG_BEACON,

				"%s: IBSS nexttbtt %u intval %u (%u)\n",

				__func__, nexttbtt,

				"IBSS nexttbtt %u intval %u (%u)\n",

				nexttbtt,

				intval & ~ATH9K_BEACON_RESET_TSF,

				conf.beacon_interval);

drivers/net/wireless/ath9k/calib.c

+31 −38
Original line number Diff line number Diff line
@@ -31,11 +31,11 @@ static const int16_t NOISE_FLOOR[] = { -96, -93, -98, -96, -93, -96 }; 
static bool ath9k_hw_nf_in_range(struct ath_hal *ah, s16 nf)

{

	if (nf > ATH9K_NF_TOO_LOW) {

		DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,

			"%s: noise floor value detected (%d) is "

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"noise floor value detected (%d) is "

			"lower than what we think is a "

			"reasonable value (%d)\n",

			__func__, nf, ATH9K_NF_TOO_LOW);

			nf, ATH9K_NF_TOO_LOW);

		return false;

	}

	return true;
@@ -116,7 +116,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah, 


	if (nf & 0x100)

		nf = 0 - ((nf ^ 0x1ff) + 1);

	DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,

	DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

		"NF calibrated [ctl] [chain 1] is %d\n", nf);

	nfarray[1] = nf;
@@ -125,7 +125,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah, 
			AR_PHY_CH2_MINCCA_PWR);

		if (nf & 0x100)

			nf = 0 - ((nf ^ 0x1ff) + 1);

		DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"NF calibrated [ctl] [chain 2] is %d\n", nf);

		nfarray[2] = nf;

	}
@@ -139,7 +139,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah, 


	if (nf & 0x100)

		nf = 0 - ((nf ^ 0x1ff) + 1);

	DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,

	DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

		"NF calibrated [ext] [chain 0] is %d\n", nf);

	nfarray[3] = nf;
@@ -161,7 +161,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah, 
			AR_PHY_CH2_EXT_MINCCA_PWR);

		if (nf & 0x100)

			nf = 0 - ((nf ^ 0x1ff) + 1);

		DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"NF calibrated [ext] [chain 2] is %d\n", nf);

		nfarray[5] = nf;

	}
@@ -187,8 +187,7 @@ static bool getNoiseFloorThresh(struct ath_hal *ah, 
		break;

	default:

		DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,

			"%s: invalid channel flags 0x%x\n", __func__,

			chan->channelFlags);

			"invalid channel flags 0x%x\n", chan->channelFlags);

		return false;

	}
@@ -206,24 +205,22 @@ static void ath9k_hw_setup_calibration(struct ath_hal *ah, 
	case IQ_MISMATCH_CAL:

		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: starting IQ Mismatch Calibration\n",

			__func__);

			"starting IQ Mismatch Calibration\n");

		break;

	case ADC_GAIN_CAL:

		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: starting ADC Gain Calibration\n", __func__);

			"starting ADC Gain Calibration\n");

		break;

	case ADC_DC_CAL:

		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: starting ADC DC Calibration\n", __func__);

			"starting ADC DC Calibration\n");

		break;

	case ADC_DC_INIT_CAL:

		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: starting Init ADC DC Calibration\n",

			__func__);

			"starting Init ADC DC Calibration\n");

		break;

	}
@@ -594,16 +591,16 @@ void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan, 


	if (ichan == NULL) {

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: invalid channel %u/0x%x; no mapping\n",

			__func__, chan->channel, chan->channelFlags);

			"invalid channel %u/0x%x; no mapping\n",

			chan->channel, chan->channelFlags);

		return;

	}





	if (currCal->calState != CAL_DONE) {

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: Calibration state incorrect, %d\n",

			__func__, currCal->calState);

			"Calibration state incorrect, %d\n",

			currCal->calState);

		return;

	}
@@ -612,8 +609,8 @@ void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan, 
		return;



	DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

		"%s: Resetting Cal %d state for channel %u/0x%x\n",

		__func__, currCal->calData->calType, chan->channel,

		"Resetting Cal %d state for channel %u/0x%x\n",

		currCal->calData->calType, chan->channel,

		chan->channelFlags);



	ichan->CalValid &= ~currCal->calData->calType;
@@ -705,8 +702,7 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah, 
	chan->channelFlags &= (~CHANNEL_CW_INT);

	if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: NF did not complete in calibration window\n",

			__func__);

			"NF did not complete in calibration window\n");

		nf = 0;

		chan->rawNoiseFloor = nf;

		return chan->rawNoiseFloor;
@@ -716,8 +712,8 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah, 
		if (getNoiseFloorThresh(ah, chan, &nfThresh)

		    && nf > nfThresh) {

			DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

				"%s: noise floor failed detected; "

				"detected %d, threshold %d\n", __func__,

				"noise floor failed detected; "

				"detected %d, threshold %d\n",

				nf, nfThresh);

			chan->channelFlags |= CHANNEL_CW_INT;

		}
@@ -759,9 +755,9 @@ s16 ath9k_hw_getchan_noise(struct ath_hal *ah, struct ath9k_channel *chan) 


	ichan = ath9k_regd_check_channel(ah, chan);

	if (ichan == NULL) {

		DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,

			"%s: invalid channel %u/0x%x; no mapping\n",

			__func__, chan->channel, chan->channelFlags);

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"invalid channel %u/0x%x; no mapping\n",

			chan->channel, chan->channelFlags);

		return ATH_DEFAULT_NOISE_FLOOR;

	}

	if (ichan->rawNoiseFloor == 0) {
@@ -788,8 +784,8 @@ bool ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan, 


	if (ichan == NULL) {

		DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,

			"%s: invalid channel %u/0x%x; no mapping\n",

			__func__, chan->channel, chan->channelFlags);

			"invalid channel %u/0x%x; no mapping\n",

			chan->channel, chan->channelFlags);

		return false;

	}
@@ -834,8 +830,8 @@ bool ath9k_hw_init_cal(struct ath_hal *ah, 


	if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {

		DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

			"%s: offset calibration failed to complete in 1ms; "

			"noisy environment?\n", __func__);

			"offset calibration failed to complete in 1ms; "

			"noisy environment?\n");

		return false;

	}
@@ -850,22 +846,19 @@ bool ath9k_hw_init_cal(struct ath_hal *ah, 
			INIT_CAL(&ahp->ah_adcGainCalData);

			INSERT_CAL(ahp, &ahp->ah_adcGainCalData);

			DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

				"%s: enabling ADC Gain Calibration.\n",

				__func__);

				"enabling ADC Gain Calibration.\n");

		}

		if (ath9k_hw_iscal_supported(ah, chan, ADC_DC_CAL)) {

			INIT_CAL(&ahp->ah_adcDcCalData);

			INSERT_CAL(ahp, &ahp->ah_adcDcCalData);

			DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

				"%s: enabling ADC DC Calibration.\n",

				__func__);

				"enabling ADC DC Calibration.\n");

		}

		if (ath9k_hw_iscal_supported(ah, chan, IQ_MISMATCH_CAL)) {

			INIT_CAL(&ahp->ah_iqCalData);

			INSERT_CAL(ahp, &ahp->ah_iqCalData);

			DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,

				"%s: enabling IQ Calibration.\n",

				__func__);

				"enabling IQ Calibration.\n");

		}



		ahp->ah_cal_list_curr = ahp->ah_cal_list;

drivers/net/wireless/ath9k/core.h

+58 −99
Original line number Diff line number Diff line
@@ -84,52 +84,33 @@ struct ath_node; 


static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};



/*************/

/* Debugging */

/*************/



enum ATH_DEBUG {

	ATH_DBG_RESET		= 0x00000001,

	ATH_DBG_PHY_IO		= 0x00000002,

	ATH_DBG_REG_IO		= 0x00000004,

	ATH_DBG_QUEUE		= 0x00000008,

	ATH_DBG_EEPROM		= 0x00000010,

	ATH_DBG_NF_CAL		= 0x00000020,

	ATH_DBG_CALIBRATE	= 0x00000040,

	ATH_DBG_CHANNEL		= 0x00000080,

	ATH_DBG_INTERRUPT	= 0x00000100,

	ATH_DBG_REGULATORY	= 0x00000200,

	ATH_DBG_ANI		= 0x00000400,

	ATH_DBG_POWER_MGMT	= 0x00000800,

	ATH_DBG_XMIT		= 0x00001000,

	ATH_DBG_BEACON		= 0x00002000,

	ATH_DBG_RATE		= 0x00004000,

	ATH_DBG_CONFIG		= 0x00008000,

	ATH_DBG_KEYCACHE	= 0x00010000,

	ATH_DBG_AGGR		= 0x00020000,

	ATH_DBG_FATAL		= 0x00040000,

	ATH_DBG_REG_IO		= 0x00000002,

	ATH_DBG_QUEUE		= 0x00000004,

	ATH_DBG_EEPROM		= 0x00000008,

	ATH_DBG_CALIBRATE	= 0x00000010,

	ATH_DBG_CHANNEL		= 0x00000020,

	ATH_DBG_INTERRUPT	= 0x00000040,

	ATH_DBG_REGULATORY	= 0x00000080,

	ATH_DBG_ANI		= 0x00000100,

	ATH_DBG_POWER_MGMT	= 0x00000200,

	ATH_DBG_XMIT		= 0x00000400,

	ATH_DBG_BEACON		= 0x00001000,

	ATH_DBG_CONFIG		= 0x00002000,

	ATH_DBG_KEYCACHE	= 0x00004000,

	ATH_DBG_FATAL		= 0x00008000,

	ATH_DBG_ANY		= 0xffffffff

};



#define DBG_DEFAULT (ATH_DBG_FATAL)



#define	DPRINTF(sc, _m, _fmt, ...) do {			\

		if (sc->sc_debug & (_m))                \

			printk(_fmt , ##__VA_ARGS__);	\

	} while (0)



/***************************/

/* Load-time Configuration */

/***************************/



/* Per-instance load-time (note: NOT run-time) configurations

 * for Atheros Device */

struct ath_config {

	u32 ath_aggr_prot;

	u16 txpowlimit;

	u16 txpowlimit_override;

	u8 cabqReadytime; /* Cabq Readytime % */

	u8 swBeaconProcess; /* Process received beacons in SW (vs HW) */

	u8 cabqReadytime;

	u8 swBeaconProcess;

};



/*************************/
@@ -167,7 +148,6 @@ struct ath_buf_state { 
	int bfs_tidno;			/* tid of this frame */

	int bfs_retries;		/* current retries */

	u32 bf_type;			/* BUF_* (enum buffer_type) */

	/* key type use to encrypt this frame */

	u32 bfs_keyix;

	enum ath9k_key_type bfs_keytype;

};
@@ -213,13 +193,6 @@ struct ath_buf { 
	dma_addr_t bf_dmacontext;

};



/*

 * reset the rx buffer.

 * any new fields added to the athbuf and require

 * reset need to be added to this macro.

 * currently bf_status is the only one requires that

 * requires reset.

 */

#define ATH_RXBUF_RESET(_bf)    ((_bf)->bf_status = 0)



/* hw processing complete, desc processed by hal */
@@ -263,11 +236,8 @@ void ath_rx_cleanup(struct ath_softc *sc); 
int ath_rx_tasklet(struct ath_softc *sc, int flush);



#define ATH_TXBUF               512

/* max number of transmit attempts (tries) */

#define ATH_TXMAXTRY            13

/* max number of 11n transmit attempts (tries) */

#define ATH_11N_TXMAXTRY        10

/* max number of tries for management and control frames */

#define ATH_MGT_TXMAXTRY        4

#define WME_BA_BMP_SIZE         64

#define WME_MAX_BA              WME_BA_BMP_SIZE
@@ -279,22 +249,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush); 
	 WME_AC_VO)





/* Wireless Multimedia Extension Defines */

#define WME_AC_BE               0 /* best effort */

#define WME_AC_BK               1 /* background */

#define WME_AC_VI               2 /* video */

#define WME_AC_VO               3 /* voice */

#define WME_AC_BE   0

#define WME_AC_BK   1

#define WME_AC_VI   2

#define WME_AC_VO   3

#define WME_NUM_AC  4



/*

 * Data transmit queue state.  One of these exists for each

 * hardware transmit queue.  Packets sent to us from above

 * are assigned to queues based on their priority.  Not all

 * devices support a complete set of hardware transmit queues.

 * For those devices the array sc_ac2q will map multiple

 * priorities to fewer hardware queues (typically all to one

 * hardware queue).

 */

struct ath_txq {

	u32 axq_qnum;			/* hardware q number */

	u32 *axq_link;			/* link ptr in last TX desc */
@@ -372,14 +332,15 @@ struct ath_xmit_status { 
#define ATH_TX_BAR          0x04

};



/* All RSSI values are noise floor adjusted */

struct ath_tx_stat {

	int rssi;		/* RSSI (noise floor ajusted) */

	int rssictl[ATH_MAX_ANTENNA];	/* RSSI (noise floor ajusted) */

	int rssiextn[ATH_MAX_ANTENNA];	/* RSSI (noise floor ajusted) */

	int rateieee;		/* data rate xmitted (IEEE rate code) */

	int rateKbps;		/* data rate xmitted (Kbps) */

	int ratecode;		/* phy rate code */

	int flags;		/* validity flags */

	int rssi;

	int rssictl[ATH_MAX_ANTENNA];

	int rssiextn[ATH_MAX_ANTENNA];

	int rateieee;

	int rateKbps;

	int ratecode;

	int flags;

/* if any of ctl,extn chain rssis are valid */

#define ATH_TX_CHAIN_RSSI_VALID 0x01

/* if extn chain rssis are valid */
@@ -415,7 +376,7 @@ void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb); 
/**********************/



#define ADDBA_EXCHANGE_ATTEMPTS    10

#define ATH_AGGR_DELIM_SZ          4   /* delimiter size   */

#define ATH_AGGR_DELIM_SZ          4

#define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */

/* number of delimiters for encryption padding */

#define ATH_AGGR_ENCRYPTDELIM      10
@@ -466,10 +427,9 @@ struct aggr_rifs_param { 


/* Per-node aggregation state */

struct ath_node_aggr {

	struct ath_atx tx;	/* node transmit state */

	struct ath_atx tx;

};



/* driver-specific node state */

struct ath_node {

	struct ath_softc *an_sc;

	struct ath_node_aggr an_aggr;
@@ -500,12 +460,11 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid 
#define ATH_SET_VAP_BSSID_MASK(bssid_mask) \

	((bssid_mask)[0] &= ~(((ATH_BCBUF-1)<<2)|0x02))



/* driver-specific vap state */

struct ath_vap {

	int av_bslot;			/* beacon slot index */

	enum ath9k_opmode av_opmode;	/* VAP operational mode */

	struct ath_buf *av_bcbuf;	/* beacon buffer */

	struct ath_tx_control av_btxctl;  /* txctl information for beacon */

	int av_bslot;

	enum ath9k_opmode av_opmode;

	struct ath_buf *av_bcbuf;

	struct ath_tx_control av_btxctl;

};



/*******************/
@@ -518,12 +477,11 @@ struct ath_vap { 
 * number of beacon intervals, the game's up.

 */

#define BSTUCK_THRESH           	(9 * ATH_BCBUF)

#define	ATH_BCBUF               	4   /* number of beacon buffers */

#define ATH_DEFAULT_BINTVAL     	100 /* default beacon interval in TU */

#define	ATH_BCBUF               	4

#define ATH_DEFAULT_BINTVAL     	100 /* TU */

#define ATH_DEFAULT_BMISS_LIMIT 	10

#define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)



/* beacon configuration */

struct ath_beacon_config {

	u16 beacon_interval;

	u16 listen_interval;
@@ -674,18 +632,18 @@ struct ath_softc { 
	u8 sc_tx_chainmask;

	u8 sc_rx_chainmask;

	enum ath9k_int sc_imask;

	enum wireless_mode sc_curmode;	/* current phy mode */

	enum wireless_mode sc_curmode;

	enum PROT_MODE sc_protmode;



	u8 sc_nbcnvaps;			/* # of vaps sending beacons */

	u16 sc_nvaps;			/* # of active virtual ap's */

	u8 sc_nbcnvaps;

	u16 sc_nvaps;

	struct ieee80211_vif *sc_vaps[ATH_BCBUF];



	u8 sc_mcastantenna;

	u8 sc_defant;			/* current default antenna */

	u8 sc_rxotherant;		/* rx's on non-default antenna */

	u8 sc_defant;

	u8 sc_rxotherant;



	struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */

	struct ath9k_node_stats sc_halstats;

	enum ath9k_ht_extprotspacing sc_ht_extprotspacing;

	enum ath9k_ht_macmode tx_chan_width;
@@ -699,22 +657,22 @@ struct ath_softc { 
	} sc_updateslot;	/* slot time update fsm */



	/* Crypto */

	u32 sc_keymax;		/* size of key cache */

	DECLARE_BITMAP(sc_keymap, ATH_KEYMAX);	/* key use bit map */

	u32 sc_keymax;

	DECLARE_BITMAP(sc_keymap, ATH_KEYMAX);

	u8 sc_splitmic;		/* split TKIP MIC keys */



	/* RX */

	struct list_head sc_rxbuf;

	struct ath_descdma sc_rxdma;

	int sc_rxbufsize;	/* rx size based on mtu */

	u32 *sc_rxlink;		/* link ptr in last RX desc */

	int sc_rxbufsize;

	u32 *sc_rxlink;



	/* TX */

	struct list_head sc_txbuf;

	struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES];

	struct ath_descdma sc_txdma;

	u32 sc_txqsetup;

	int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME	AC -> h/w qnum */

	int sc_haltype2q[ATH9K_WME_AC_VO+1];

	u16 seq_no; /* TX sequence number */



	/* Beacon */
@@ -724,13 +682,13 @@ struct ath_softc { 
	struct list_head sc_bbuf;

	u32 sc_bhalq;

	u32 sc_bmisscount;

	u32 ast_be_xmit;	/* beacons transmitted */

	u32 ast_be_xmit;

	u64 bc_tstamp;



	/* Rate */

	struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];

	struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];

	u8 sc_protrix;		/* protection rate index */

	u8 sc_protrix;



	/* Channel, Band */

	struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX];
@@ -755,6 +713,7 @@ struct ath_softc { 
	struct ath_ani sc_ani;

};



void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...);

int ath_reset(struct ath_softc *sc, bool retry_tx);

int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);

int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);

drivers/net/wireless/ath9k/eeprom.c

+7 −9
Original line number Diff line number Diff line
@@ -116,7 +116,7 @@ static int ath9k_hw_flash_map(struct ath_hal *ah) 


	if (!ahp->ah_cal_mem) {

		DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,

			"%s: cannot remap eeprom region \n", __func__);

			"cannot remap eeprom region \n");

		return -EIO;

	}
@@ -149,7 +149,7 @@ static bool ath9k_hw_fill_eeprom(struct ath_hal *ah) 


	if (!ath9k_hw_use_flash(ah)) {

		DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,

			"%s: Reading from EEPROM, not flash\n", __func__);

			"Reading from EEPROM, not flash\n");

		ar5416_eep_start_loc = 256;

	}
@@ -162,8 +162,7 @@ static bool ath9k_hw_fill_eeprom(struct ath_hal *ah) 
		if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc,

					 eep_data)) {

			DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,

				"%s: Unable to read eeprom region \n",

				__func__);

				"Unable to read eeprom region \n");

			return false;

		}

		eep_data++;
@@ -185,12 +184,11 @@ static int ath9k_hw_check_eeprom(struct ath_hal *ah) 
		if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,

					 &magic)) {

			DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,

				"%s: Reading Magic # failed\n", __func__);

				"Reading Magic # failed\n");

			return false;

		}



		DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "%s: Read Magic = 0x%04X\n",

			 __func__, magic);

		DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "Read Magic = 0x%04X\n", magic);



		if (magic != AR5416_EEPROM_MAGIC) {

			magic2 = swab16(magic);
@@ -1205,11 +1203,11 @@ bool ath9k_hw_set_power_cal_table(struct ath_hal *ah, 
					((pdadcValues[4 * j + 3] & 0xFF) << 24);

				REG_WRITE(ah, regOffset, reg32);



				DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,

				DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,

					"PDADC (%d,%4x): %4.4x %8.8x\n",

					i, regChainOffset, regOffset,

					reg32);

				DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,

				DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,

					"PDADC: Chain %d | PDADC %3d Value %3d | "

					"PDADC %3d Value %3d | PDADC %3d Value %3d | "

					"PDADC %3d Value %3d |\n",

CRA Git | Maintained and supported by SUSTech CRA and CCSE