Commit 04253939 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.7-2020-03-19' of git://people.freedesktop.org/~agd5f/linux into drm-next 



amd-drm-next-5.7-2020-03-19:

amdgpu:
- SR-IOV fixes
- RAS fixes
- Fallthrough cleanups
- Kconfig fix for ACP
- Fix load balancing with VCN
- DC fixes
- GPU reset fixes
- Various cleanups

scheduler:
- Revert job distribution optimization
- Add a helper to pick the least loaded scheduler

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200319175418.4237-1-alexander.deucher@amd.com
parents 7c2cb99f 8cd29608

drivers/gpu/drm/amd/acp/Kconfig

+1 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: MIT

menu "ACP (Audio CoProcessor) Configuration"

	depends on DRM_AMDGPU



config DRM_AMD_ACP

	bool "Enable AMD Audio CoProcessor IP support"

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −0
Original line number Diff line number Diff line
@@ -994,6 +994,8 @@ uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg, 
			uint32_t acc_flags);

void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,

		    uint32_t acc_flags);

void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev, uint32_t reg, uint32_t v,

		    uint32_t acc_flags);

void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);

uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

+1 −1
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev, 
		dev_warn(adev->dev,

			 "Invalid sdma engine id (%d), using engine id 0\n",

			 engine_id);

		/* fall through */

		fallthrough;

	case 0:

		sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA0, 0,

				mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

+45 −41
Original line number Diff line number Diff line
@@ -121,12 +121,16 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, const u32 hw_ip, const 
		num_scheds = 1;

		break;

	case AMDGPU_HW_IP_VCN_DEC:

			scheds = adev->vcn.vcn_dec_sched;

			num_scheds =  adev->vcn.num_vcn_dec_sched;

		sched = drm_sched_pick_best(adev->vcn.vcn_dec_sched,

					    adev->vcn.num_vcn_dec_sched);

		scheds = &sched;

		num_scheds = 1;

		break;

	case AMDGPU_HW_IP_VCN_ENC:

			scheds = adev->vcn.vcn_enc_sched;

			num_scheds =  adev->vcn.num_vcn_enc_sched;

		sched = drm_sched_pick_best(adev->vcn.vcn_enc_sched,

					    adev->vcn.num_vcn_enc_sched);

		scheds = &sched;

		num_scheds = 1;

		break;

	case AMDGPU_HW_IP_VCN_JPEG:

		scheds = adev->jpeg.jpeg_sched;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

+5 −5
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 
#include "amdgpu.h"

#include "amdgpu_pm.h"

#include "amdgpu_dm_debugfs.h"

#include "amdgpu_ras.h"



/**

 * amdgpu_debugfs_add_files - Add simple debugfs entries
@@ -178,7 +179,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f, 
		} else {

			r = get_user(value, (uint32_t *)buf);

			if (!r)

				WREG32(*pos >> 2, value);

				amdgpu_mm_wreg_mmio_rlc(adev, *pos >> 2, value, 0);

		}

		if (r) {

			result = r;
@@ -783,11 +784,11 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file *f, char __user *buf, 
	ssize_t result = 0;

	uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data;



	if (size & 3 || *pos & 3)

	if (size > 4096 || size & 3 || *pos & 3)

		return -EINVAL;



	/* decode offset */

	offset = *pos & GENMASK_ULL(11, 0);

	offset = (*pos & GENMASK_ULL(11, 0)) >> 2;

	se = (*pos & GENMASK_ULL(19, 12)) >> 12;

	sh = (*pos & GENMASK_ULL(27, 20)) >> 20;

	cu = (*pos & GENMASK_ULL(35, 28)) >> 28;
@@ -825,7 +826,7 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file *f, char __user *buf, 
	while (size) {

		uint32_t value;



		value = data[offset++];

		value = data[result >> 2];

		r = put_user(value, (uint32_t *)buf);

		if (r) {

			result = r;
@@ -1294,7 +1295,6 @@ DEFINE_SIMPLE_ATTRIBUTE(fops_ib_preempt, NULL, 
DEFINE_SIMPLE_ATTRIBUTE(fops_sclk_set, NULL,

			amdgpu_debugfs_sclk_set, "%llu\n");



extern void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev);

int amdgpu_debugfs_init(struct amdgpu_device *adev)

{

	int r, i;

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