Commit 041f9d33 authored by Jeremy McDermond's avatar Jeremy McDermond Committed by Mark Brown
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ASoC: tlv320aic32x4: Add 96k sample rate 



The TLV320AIC32x4 series supports 96ksps rates in hardware.  This patch
adds the necessary PLL divider values and clock settings to the table to
make 96ksps work.

Signed-off-by: default avatarJeremy McDermond <nh6z@nh6z.net>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 125bc681

sound/soc/codecs/tlv320aic32x4.c

+5 −2
Original line number Diff line number Diff line
@@ -159,7 +159,10 @@ static const struct aic32x4_rate_divs aic32x4_divs[] = { 
	/* 48k rate */

	{AIC32X4_FREQ_12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4},

	{AIC32X4_FREQ_24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4},

	{AIC32X4_FREQ_25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4}

	{AIC32X4_FREQ_25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4},



	/* 96k rate */

	{AIC32X4_FREQ_25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1},

};



static const struct snd_kcontrol_new hpl_output_mixer_controls[] = {
@@ -564,7 +567,7 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec, 
	return 0;

}



#define AIC32X4_RATES	SNDRV_PCM_RATE_8000_48000

#define AIC32X4_RATES	SNDRV_PCM_RATE_8000_96000

#define AIC32X4_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \

			 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)

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