Commit 041c7951 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma 

Pull dmaengine updates from Vinod Koul:
 "This time we have a very typical update which is mostly fixes and
  updates to drivers and no new drivers.

   - the biggest change is coming from Peter for edma cleanup which even
     caused some last minute regression, things seem settled now
   - idma64 and dw updates
   - iotdma updates
   - module autoload fixes for various drivers
   - scatter gather support for hdmac"

* tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (77 commits)
  dmaengine: edma: Add dummy driver skeleton for edma3-tptc
  Revert "ARM: DTS: am33xx: Use the new DT bindings for the eDMA3"
  Revert "ARM: DTS: am437x: Use the new DT bindings for the eDMA3"
  dmaengine: dw: some Intel devices has no memcpy support
  dmaengine: dw: platform: provide platform data for Intel
  dmaengine: dw: don't override platform data with autocfg
  dmaengine: hdmac: Add scatter-gathered memset support
  dmaengine: hdmac: factorise memset descriptor allocation
  dmaengine: virt-dma: Fix kernel-doc annotations
  ARM: DTS: am437x: Use the new DT bindings for the eDMA3
  ARM: DTS: am33xx: Use the new DT bindings for the eDMA3
  dmaengine: edma: New device tree binding
  dmaengine: Kconfig: edma: Select TI_DMA_CROSSBAR in case of ARCH_OMAP
  dmaengine: ti-dma-crossbar: Add support for crossbar on AM33xx/AM43xx
  dmaengine: edma: Merge the of parsing functions
  dmaengine: edma: Do not allocate memory for edma_rsv_info in case of DT boot
  dmaengine: edma: Refactor the dma device and channel struct initialization
  dmaengine: edma: Get qDMA channel information from HW also
  dmaengine: edma: Merge map_dmach_to_queue into assign_channel_eventq
  dmaengine: edma: Correct PaRAM access function names (_parm_ to _param_)
  ...
parents 7d884710 34635b1a

Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt

+13 −2
Original line number Diff line number Diff line
@@ -2,9 +2,10 @@ Texas Instruments DMA Crossbar (DMA request router) 


Required properties:

- compatible:	"ti,dra7-dma-crossbar" for DRA7xx DMA crossbar

		"ti,am335x-edma-crossbar" for AM335x and AM437x

- reg:		Memory map for accessing module

- #dma-cells:	Should be set to <1>.

		Clients should use the crossbar request number (input)

- #dma-cells:	Should be set to to match with the DMA controller's dma-cells

		for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.

- dma-requests:	Number of DMA requests the crossbar can receive

- dma-masters:	phandle pointing to the DMA controller
@@ -14,6 +15,15 @@ The DMA controller node need to have the following poroperties: 
Optional properties:

- ti,dma-safe-map: Safe routing value for unused request lines



Notes:

When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request

the DMA event number as crossbar ID (input to the DMA crossbar).



For ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients:

dmas = <&edma_xbar 12 0 1>; where <12> is the DMA request number, <0> is the TC

the event should be assigned and <1> is the mux selection for in the crossbar.

When mux 0 is used the DMA channel can be requested directly from edma node.



Example:



/* DMA controller */
@@ -47,6 +57,7 @@ uart1: serial@4806a000 { 
	ti,hwmods = "uart1";

	clock-frequency = <48000000>;

	status = "disabled";

	/* Requesting crossbar input 49 and 50 */

	dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;

	dma-names = "tx", "rx";

};

Documentation/devicetree/bindings/dma/ti-edma.txt

+116 −1
Original line number Diff line number Diff line 
TI EDMA

Texas Instruments eDMA



The eDMA3 consists of two components: Channel controller (CC) and Transfer

Controller(s) (TC). The CC is the main entry for DMA users since it is

responsible for the DMA channel handling, while the TCs are responsible to

execute the actual DMA tansfer.



------------------------------------------------------------------------------

eDMA3 Channel Controller



Required properties:

- compatible:	"ti,edma3-tpcc" for the channel controller(s)

- #dma-cells:	Should be set to <2>. The first number is the DMA request

		number and the second is the TC the channel is serviced on.

- reg:		Memory map of eDMA CC

- reg-names:	"edma3_cc"

- interrupts:	Interrupt lines for CCINT, MPERR and CCERRINT.

- interrupt-names: "edma3_ccint", "emda3_mperr" and "edma3_ccerrint"

- ti,tptcs:	List of TPTCs associated with the eDMA in the following form:

		<&tptc_phandle TC_priority_number>. The highest priority is 0.



Optional properties:

- ti,hwmods:	Name of the hwmods associated to the eDMA CC

- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow

		these channels will be SW triggered channels. The list must

		contain 16 bits numbers, see example.

- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by

		the driver, they are allocated to be used by for example the

		DSP. See example.



------------------------------------------------------------------------------

eDMA3 Transfer Controller



Required properties:

- compatible:	"ti,edma3-tptc" for the transfer controller(s)

- reg:		Memory map of eDMA TC

- interrupts:	Interrupt number for TCerrint.



Optional properties:

- ti,hwmods:	Name of the hwmods associated to the given eDMA TC

- interrupt-names: "edma3_tcerrint"



------------------------------------------------------------------------------

Example:



edma: edma@49000000 {

	compatible = "ti,edma3-tpcc";

	ti,hwmods = "tpcc";

	reg =	<0x49000000 0x10000>;

	reg-names = "edma3_cc";

	interrupts = <12 13 14>;

	interrupt-names = "edma3_ccint", "emda3_mperr", "edma3_ccerrint";

	dma-requests = <64>;

	#dma-cells = <2>;



	ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 7>, <&edma_tptc2 0>;



	/* Channel 20 and 21 is allocated for memcpy */

	ti,edma-memcpy-channels = /bits/ 16 <20 21>;

	/* The following PaRAM slots are reserved: 35-45 and 100-110 */

	ti,edma-reserved-slot-ranges = /bits/ 16 <35 10>,

				       /bits/ 16 <100 10>;

};



edma_tptc0: tptc@49800000 {

	compatible = "ti,edma3-tptc";

	ti,hwmods = "tptc0";

	reg =	<0x49800000 0x100000>;

	interrupts = <112>;

	interrupt-names = "edm3_tcerrint";

};



edma_tptc1: tptc@49900000 {

	compatible = "ti,edma3-tptc";

	ti,hwmods = "tptc1";

	reg =	<0x49900000 0x100000>;

	interrupts = <113>;

	interrupt-names = "edm3_tcerrint";

};



edma_tptc2: tptc@49a00000 {

	compatible = "ti,edma3-tptc";

	ti,hwmods = "tptc2";

	reg =	<0x49a00000 0x100000>;

	interrupts = <114>;

	interrupt-names = "edm3_tcerrint";

};



sham: sham@53100000 {

	compatible = "ti,omap4-sham";

	ti,hwmods = "sham";

	reg = <0x53100000 0x200>;

	interrupts = <109>;

	/* DMA channel 36 executed on eDMA TC0 - low priority queue */

	dmas = <&edma 36 0>;

	dma-names = "rx";

};



mcasp0: mcasp@48038000 {

	compatible = "ti,am33xx-mcasp-audio";

	ti,hwmods = "mcasp0";

	reg = <0x48038000 0x2000>,

		<0x46000000 0x400000>;

	reg-names = "mpu", "dat";

	interrupts = <80>, <81>;

	interrupt-names = "tx", "rx";

	status = "disabled";

	/* DMA channels 8 and 9 executed on eDMA TC2 - high priority queue */

	dmas = <&edma 8 2>,

	       <&edma 9 2>;

	dma-names = "tx", "rx";

};



------------------------------------------------------------------------------

DEPRECATED binding, new DTS files must use the ti,edma3-tpcc/ti,edma3-tptc

binding.



Required properties:

- compatible : "ti,edma3"

arch/arm/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -737,7 +737,6 @@ config ARCH_DAVINCI 
	select GENERIC_CLOCKEVENTS

	select GENERIC_IRQ_CHIP

	select HAVE_IDE

	select TI_PRIV_EDMA

	select USE_OF

	select ZONE_DMA

	help

arch/arm/common/Kconfig

+0 −3
Original line number Diff line number Diff line
@@ -17,6 +17,3 @@ config SHARP_PARAM 


config SHARP_SCOOP

	bool
 


config TI_PRIV_EDMA

	bool

arch/arm/common/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -15,6 +15,5 @@ obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o 
CFLAGS_REMOVE_mcpm_entry.o	= -pg

AFLAGS_mcpm_head.o		:= -march=armv7-a

AFLAGS_vlock.o			:= -march=armv7-a

obj-$(CONFIG_TI_PRIV_EDMA)	+= edma.o

obj-$(CONFIG_BL_SWITCHER)	+= bL_switcher.o

obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o

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